Krunoslav Kovac 6d92b5c2d5 drm/amd/display: Refactor SDR cursor boosting in HDR mode ... [Why] Cursor boosting is done via CNVC_CUR register which is DPP, not HUBP Previous commit was implementing it in HUBP functions, and also breaking diags tests. [How] 1. Undo original commit as well as Eric's diags test fix, almost completely 2. Move programming to DPP and call via new dc_stream function 3. Also removing cur_rom_en from dpp_cursor_attributes and programming as part of normal cursor attributes as it depends on cursor color format Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-07-16 16:11:49 -05:00
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hw	drm/amd/display: Refactor SDR cursor boosting in HDR mode	2018-07-16 16:11:49 -05:00
bw_fixed.h	amdgpu/dc: allow inlining constant int to fixed a lot better.	2017-09-29 13:03:35 -04:00
clock_source.h
compressor.h
core_status.h	drm/amd/display: Add timing validation against dongle cap	2017-11-28 17:54:16 -05:00
core_types.h	drm/amd/display: remove dentist_vco_freq from resource_pool	2018-07-13 14:49:12 -05:00
custom_float.h
dc_link_ddc.h	drm/amd/display: Return aux replies directly to DRM	2018-07-13 14:48:36 -05:00
dc_link_dp.h	drm/amd/display: Add return value for detect dp.	2018-02-19 14:19:32 -05:00
dce_calcs.h	drm/amdgpu/display: remove VEGAM config option	2018-05-18 16:08:18 -05:00
dcn_calcs.h	drm/amd/display: replace clocks_value struct with dc_clocks	2018-07-05 16:38:27 -05:00
hw_sequencer.h	drm/amd/display: Refactor SDR cursor boosting in HDR mode	2018-07-16 16:11:49 -05:00
link_hwss.h	drm/amd/display: add eDP 1.2+ polling for T7	2018-02-19 14:19:34 -05:00
reg_helper.h	drm/amd/display: generic indirect register access	2018-07-13 14:47:33 -05:00
resource.h	drm/amd/display: Add num_opp to resource_caps	2018-06-15 12:24:57 -05:00