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linux/drivers/gpu/drm/amd/include/asic_reg/gc
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Tom St Denis 6c33a6f4c8 drm/amd/amdgpu: Move PWR_MISC_CNTL_STATUS to its own header 
The register is part of the PWR block not the GC block.  Move to
its own header.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-04-01 14:44:43 -04:00
..
gc_9_0_default.h
gc_9_0_offset.h drm/amdgpu: Add mmCOMPUTE_STATIC_THREAD_MGMT_SE4-7 to support Arcturus 2019-12-23 14:56:37 -05:00
gc_9_0_sh_mask.h drm/amdgpu: Enable DISABLE_BARRIER_WAITCNT for Arcturus 2020-01-30 17:15:27 -05:00
gc_9_1_offset.h drm/amd/amdgpu: Move PWR_MISC_CNTL_STATUS to its own header 2020-04-01 14:44:43 -04:00
gc_9_1_sh_mask.h drm/amd/amdgpu: Move PWR_MISC_CNTL_STATUS to its own header 2020-04-01 14:44:43 -04:00
gc_9_2_1_offset.h
gc_9_2_1_sh_mask.h
gc_9_4_1_offset.h drm/amdgpu: add EDC counter registers of gc for Arcturus 2020-01-22 16:36:22 -05:00
gc_9_4_1_sh_mask.h drm/amdgpu: add EDC counter registers of gc for Arcturus 2020-01-22 16:36:22 -05:00
gc_10_1_0_default.h
gc_10_1_0_offset.h drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header 2019-08-02 10:30:40 -05:00
gc_10_1_0_sh_mask.h drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header 2019-08-02 10:30:40 -05:00