linux/drivers/gpu/drm/amd/display/amdgpu_dm
Nicholas Kazlauskas 695af5f9a5 drm/amd/display: Rework DC plane filling and surface updates
[Why]
We currently don't do DC validation for medium or full updates where
the plane state isn't created. There are some medium and full updates
that can cause bandwidth or clock changes to occur resulting in
underflow or corruption.

We need to be able to fill surface and plane info updates during
atomic commit for dm_determine_update_type for commit. Since we already
do this during atomic commit tail it would be good if we had the same
logic in both places for creating these structures.

[How]
Introduce fill_dc_scaling_info and fill_dc_plane_info_and_addr.
These two functions cover the following three update structures:

- struct dc_scaling_info
- struct dc_plane_info
- struct dc_plane_address

Cleanup and adapter the existing fill_plane_* helpers to work with
these functions.

Update call sites that used most of these sub helpers directly to work
with the new functions. The exception being prepare_fb - we just want
the new buffer attributes specifically in the case where we're
creating the plane. This is needed for dc_commit_state in the case
where the FB hasn't been previously been used.

This isn't quite a refactor, but functionally driver behavior should
be mostly the smae as before. The one exception is that we now check
the return code for fill_plane_buffer_attributes which means that
commits will be rejected that try to enable DCC with erroneous
parameters.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-15 00:21:07 -05:00
..
amdgpu_dm.c drm/amd/display: Rework DC plane filling and surface updates 2019-04-15 00:21:07 -05:00
amdgpu_dm.h drm/amd/display: In VRR mode, do DRM core vblank handling at end of vblank. (v2) 2019-04-03 10:00:33 -05:00
amdgpu_dm_color.c drm/amd/display: program default output gamma 2019-03-27 22:41:25 -05:00
amdgpu_dm_crc.c drm/amd/display: Re-enable CRC capture following modeset 2019-01-28 11:44:03 -05:00
amdgpu_dm_debugfs.c drm/amd/display: Add debugfs entry for amdgpu_dm_visual_confirm 2019-04-10 13:53:27 -05:00
amdgpu_dm_debugfs.h drm/amd/display: Add support for hw_state logging via debugfs 2018-08-27 15:20:17 -05:00
amdgpu_dm_helpers.c drm/amd/display: Poll pending DOWN_REP before enabling the link 2019-03-19 15:04:02 -05:00
amdgpu_dm_irq.c drm/amd/display: In VRR mode, do DRM core vblank handling at end of vblank. (v2) 2019-04-03 10:00:33 -05:00
amdgpu_dm_irq.h
amdgpu_dm_mst_types.c drm/amd/display: Respect aux return values 2019-03-19 15:04:02 -05:00
amdgpu_dm_mst_types.h drm/amd/display: Cleanup MST non-atomic code workaround 2018-11-07 18:20:49 -05:00
amdgpu_dm_pp_smu.c drm/amd/display: Clean up old pplib interface functions 2019-03-27 22:41:49 -05:00
amdgpu_dm_services.c drm: Split out drm_probe_helper.h 2019-01-24 13:20:42 +01:00
amdgpu_dm_trace.h drm/amd/display: Add tracing to dc 2018-12-05 17:49:49 -05:00
Makefile