Conor Dooley 6863aaa885 riscv: dts: microchip: add the mpfs' fabric clock control ... The "fabric clocks" in current PolarFire SoC device trees are not really fixed clocks. Their frequency is set by the bitstream, so having them located in -fabric.dtsi is not a problem - they're just as "fixed" as the IP blocks etc used in the FPGA fabric. However, their configuration can be read at runtime (and to an extent they can be controlled, although the intended usage is static configurations set by the bitstream) through the system controller bus. In the v2022.09 icicle kit reference design a single CCC (north-west corner) is enabled, using a 50 MHz off-chip oscillator as its reference. Updating to the v2022.09 icicle kit reference design is required, as prior to this release, the CCC was not fixed & could change for any given run of the synthesis tool. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>		2022-10-19 17:32:44 +01:00
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Makefile	riscv: dts: microchip: add a devicetree for aries' m100pfsevp	2022-09-27 18:53:58 +01:00
mpfs-icicle-kit-fabric.dtsi	riscv: dts: microchip: add the mpfs' fabric clock control	2022-10-19 17:32:44 +01:00
mpfs-icicle-kit.dts	riscv: dts: microchip: add the mpfs' fabric clock control	2022-10-19 17:32:44 +01:00
mpfs-m100pfs-fabric.dtsi	riscv: dts: microchip: add a devicetree for aries' m100pfsevp	2022-09-27 18:53:58 +01:00
mpfs-m100pfsevp.dts	riscv: dts: microchip: add a devicetree for aries' m100pfsevp	2022-09-27 18:53:58 +01:00
mpfs-polarberry-fabric.dtsi	riscv: dts: microchip: move the mpfs' pci node to -fabric.dtsi	2022-09-27 18:53:58 +01:00
mpfs-polarberry.dts	riscv: dts: microchip: mpfs: remove bogus card-detect-delay	2022-08-23 22:15:54 +01:00
mpfs-sev-kit-fabric.dtsi	riscv: dts: microchip: add sevkit device tree	2022-09-27 18:53:58 +01:00
mpfs-sev-kit.dts	riscv: dts: microchip: add sevkit device tree	2022-09-27 18:53:58 +01:00
mpfs.dtsi	riscv: dts: microchip: add the mpfs' fabric clock control	2022-10-19 17:32:44 +01:00