Mauro Rossi 683b59504d drm/amd/display: dc/core: add SI/DCE6 support (v2) ... [Why] resource_parse_asic_id() and dc_create_resource_pool() are missing SI/DCE6 cases [How] SI/DCE6 cases support added using existing DCE8 implementation as a reference (v2) updated due to following kernel 5.2 commit: d9673c9 ("drm/amd/display: Pass init_data into DCN resource creation") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-07-27 16:45:55 -04:00
..
amdgpu_dm	drm/amd/display: Use seperate dmcub firmware for navy_flounder	2020-07-27 16:23:46 -04:00
dc	drm/amd/display: dc/core: add SI/DCE6 support (v2)	2020-07-27 16:45:55 -04:00
dmub	drm/amd/display: [FW Promotion] Release 0.0.25	2020-07-21 15:37:39 -04:00
include	drm/amd/display: add asics info for SI parts	2020-07-27 16:45:44 -04:00
modules	drm/amd/display: Implement AMD VSIF V3	2020-07-21 15:37:39 -04:00
Kconfig	drm/amd/display: Add DCN3 to Kconfig	2020-07-01 01:59:15 -04:00
Makefile
TODO