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db8196df4b
fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: H Hartley Sweeten <hartleys@visionengravers.com> Cc: Li Yang <leoli@freescale.com> Cc: Zhang Wei <zw@zh-kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Barry Song <Baohua.Song@csr.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
93 lines
2.6 KiB
C
93 lines
2.6 KiB
C
#ifndef __ASM_ARCH_DMA_H
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#define __ASM_ARCH_DMA_H
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#include <linux/types.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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/*
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* M2P channels.
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*
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* Note that these values are also directly used for setting the PPALLOC
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* register.
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*/
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#define EP93XX_DMA_I2S1 0
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#define EP93XX_DMA_I2S2 1
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#define EP93XX_DMA_AAC1 2
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#define EP93XX_DMA_AAC2 3
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#define EP93XX_DMA_AAC3 4
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#define EP93XX_DMA_I2S3 5
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#define EP93XX_DMA_UART1 6
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#define EP93XX_DMA_UART2 7
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#define EP93XX_DMA_UART3 8
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#define EP93XX_DMA_IRDA 9
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/* M2M channels */
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#define EP93XX_DMA_SSP 10
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#define EP93XX_DMA_IDE 11
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/**
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* struct ep93xx_dma_data - configuration data for the EP93xx dmaengine
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* @port: peripheral which is requesting the channel
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* @direction: TX/RX channel
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* @name: optional name for the channel, this is displayed in /proc/interrupts
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*
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* This information is passed as private channel parameter in a filter
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* function. Note that this is only needed for slave/cyclic channels. For
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* memcpy channels %NULL data should be passed.
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*/
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struct ep93xx_dma_data {
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int port;
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enum dma_transfer_direction direction;
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const char *name;
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};
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/**
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* struct ep93xx_dma_chan_data - platform specific data for a DMA channel
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* @name: name of the channel, used for getting the right clock for the channel
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* @base: mapped registers
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* @irq: interrupt number used by this channel
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*/
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struct ep93xx_dma_chan_data {
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const char *name;
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void __iomem *base;
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int irq;
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};
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/**
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* struct ep93xx_dma_platform_data - platform data for the dmaengine driver
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* @channels: array of channels which are passed to the driver
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* @num_channels: number of channels in the array
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*
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* This structure is passed to the DMA engine driver via platform data. For
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* M2P channels, contract is that even channels are for TX and odd for RX.
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* There is no requirement for the M2M channels.
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*/
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struct ep93xx_dma_platform_data {
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struct ep93xx_dma_chan_data *channels;
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size_t num_channels;
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};
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static inline bool ep93xx_dma_chan_is_m2p(struct dma_chan *chan)
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{
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return !strcmp(dev_name(chan->device->dev), "ep93xx-dma-m2p");
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}
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/**
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* ep93xx_dma_chan_direction - returns direction the channel can be used
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* @chan: channel
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*
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* This function can be used in filter functions to find out whether the
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* channel supports given DMA direction. Only M2P channels have such
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* limitation, for M2M channels the direction is configurable.
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*/
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static inline enum dma_transfer_direction
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ep93xx_dma_chan_direction(struct dma_chan *chan)
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{
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if (!ep93xx_dma_chan_is_m2p(chan))
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return DMA_NONE;
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/* even channels are for TX, odd for RX */
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return (chan->chan_id % 2 == 0) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
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}
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#endif /* __ASM_ARCH_DMA_H */
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