Paul Burton 5bb29275df MIPS: bitops: Emit Loongson3 sync workarounds within asm ... Generate the sync instructions required to workaround Loongson3 LL/SC errata within inline asm blocks, which feels a little safer than doing it from C where strictly speaking the compiler would be well within its rights to insert a memory access between the separate asm statements we previously had, containing sync & ll instructions respectively. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: Huacai Chen <chenhc@lemote.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: linux-kernel@vger.kernel.org		2019-10-07 09:42:57 -07:00
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asm	MIPS: bitops: Emit Loongson3 sync workarounds within asm	2019-10-07 09:42:57 -07:00
uapi/asm	mm: introduce MADV_PAGEOUT	2019-09-25 17:51:41 -07:00