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59abab5ad2
Add function of init mircrocode for smu11. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
100 lines
3 KiB
C
100 lines
3 KiB
C
/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "pp_debug.h"
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#include <linux/firmware.h>
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#include "amdgpu.h"
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#include "amdgpu_smu.h"
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#include "smu_v11_0.h"
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MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
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static int smu_v11_0_init_microcode(struct smu_context *smu)
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{
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struct amdgpu_device *adev = smu->adev;
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const char *chip_name;
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char fw_name[30];
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int err = 0;
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const struct smc_firmware_header_v1_0 *hdr;
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const struct common_firmware_header *header;
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struct amdgpu_firmware_info *ucode = NULL;
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switch (adev->asic_type) {
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case CHIP_VEGA20:
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chip_name = "vega20";
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break;
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default:
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BUG();
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}
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snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_smc.bin", chip_name);
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err = request_firmware(&adev->pm.fw, fw_name, adev->dev);
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if (err)
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goto out;
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err = amdgpu_ucode_validate(adev->pm.fw);
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if (err)
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goto out;
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hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;
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amdgpu_ucode_print_smc_hdr(&hdr->header);
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adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version);
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if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
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ucode = &adev->firmware.ucode[AMDGPU_UCODE_ID_SMC];
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ucode->ucode_id = AMDGPU_UCODE_ID_SMC;
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ucode->fw = adev->pm.fw;
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header = (const struct common_firmware_header *)ucode->fw->data;
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adev->firmware.fw_size +=
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ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);
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}
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out:
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if (err) {
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DRM_ERROR("smu_v11_0: Failed to load firmware \"%s\"\n",
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fw_name);
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release_firmware(adev->pm.fw);
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adev->pm.fw = NULL;
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}
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return err;
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}
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static int smu_v11_0_load_microcode(struct smu_context *smu)
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{
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return 0;
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}
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static int smu_v11_0_check_fw_status(struct smu_context *smu)
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{
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return 0;
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}
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static const struct smu_funcs smu_v11_0_funcs = {
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.init_microcode = smu_v11_0_init_microcode,
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.load_microcode = smu_v11_0_load_microcode,
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.check_fw_status = smu_v11_0_check_fw_status,
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};
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void smu_v11_0_set_smu_funcs(struct smu_context *smu)
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{
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smu->funcs = &smu_v11_0_funcs;
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}
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