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Updating the cache maintenance order before CPU shutdown when doing CPU hotplug. The old order: * clean L1 by flush_cache_all * exit SMP * CPU shutdown Adapt to: * disable L1 data cache by clear C bit * clean L1 by v7_flush_dcache_louis * exit SMP * CPU shutdown For CPU hotplug case, it's no need to do "flush_cache_all". And we should disable L1 data cache before clean L1 data cache. Then leaving the SMP coherency. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
68 lines
1.4 KiB
C
68 lines
1.4 KiB
C
/*
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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* Copyright (c) 2010, 2012 NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include "sleep.h"
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#include "tegra_cpu_car.h"
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static void (*tegra_hotplug_shutdown)(void);
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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void __ref tegra_cpu_die(unsigned int cpu)
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{
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cpu = cpu_logical_map(cpu);
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/* Clean L1 data cache */
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tegra_disable_clean_inv_dcache();
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/* Shut down the current CPU. */
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tegra_hotplug_shutdown();
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/* Clock gate the CPU */
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tegra_wait_cpu_in_reset(cpu);
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tegra_disable_cpu_clock(cpu);
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/* Should never return here. */
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BUG();
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}
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int tegra_cpu_disable(unsigned int cpu)
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{
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/*
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* we don't allow CPU 0 to be shutdown (it is still too special
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* e.g. clock tick interrupts)
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*/
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return cpu == 0 ? -EPERM : 0;
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}
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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extern void tegra20_hotplug_shutdown(void);
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void __init tegra20_hotplug_init(void)
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{
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tegra_hotplug_shutdown = tegra20_hotplug_shutdown;
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}
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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extern void tegra30_hotplug_shutdown(void);
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void __init tegra30_hotplug_init(void)
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{
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tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
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}
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#endif
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