Evan Quan 61d7d0d5ad drm/amd/pm: revise the performance level setting APIs ... Avoid cross callings which make lock protection enforcement on amdgpu_dpm_force_performance_level() impossible. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-01-14 17:51:15 -05:00
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asic_reg	drm/amdgpu: clean up some leftovers from bring up	2021-12-16 14:08:20 -05:00
ivsrcid
aldebaran_ip_offset.h
amd_acpi.h
amd_pcie.h
amd_pcie_helpers.h
amd_shared.h	drm/amd/pm: revise the performance level setting APIs	2022-01-14 17:51:15 -05:00
arct_ip_offset.h
atom-bits.h
atom-names.h
atom-types.h
atombios.h	gpu: amd: replace open-coded offsetof() with builtin	2021-09-29 17:30:00 -04:00
atomfirmware.h	drm/amd/display: Add DP 2.0 BIOS and DMUB Support	2021-09-01 16:55:10 -04:00
atomfirmwareid.h
beige_goby_ip_offset.h
cgs_common.h
cik_structs.h
cyan_skillfish_ip_offset.h	drm/amd: Mark IP_BASE definition as __maybe_unused	2021-12-13 16:32:34 -05:00
dimgrey_cavefish_ip_offset.h
discovery.h	drm/amdgpu: add support for IP discovery gc_info table v2	2021-12-16 14:08:20 -05:00
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h	drm/amdkfd: remove kgd_dev declaration and initialization	2021-11-17 16:58:03 -05:00
kgd_pp_interface.h	drm/amd/pm: do not expose the smu_context structure used internally in power	2022-01-14 17:51:14 -05:00
navi10_enum.h	drm/amdgpu: Update NV SIMD-per-CU to 2	2021-07-01 00:05:18 -04:00
navi10_ip_offset.h
navi12_ip_offset.h
navi14_ip_offset.h
pptable.h
renoir_ip_offset.h
sienna_cichlid_ip_offset.h
soc15_hw_ip.h	drm/amdgpu: add HWID of SDMA instance 2 and 3	2021-10-04 15:23:01 -04:00
soc15_ih_clientid.h
v9_structs.h
v10_structs.h
vangogh_ip_offset.h
vega10_enum.h
vega10_ip_offset.h
vega20_ip_offset.h
vi_structs.h
yellow_carp_offset.h	drm/amd: Mark IP_BASE definition as __maybe_unused	2021-12-13 16:32:34 -05:00