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54b34aa0a7
The SCU IPC functionality is usable outside of Intel MID devices. For example modern Intel CPUs include the same thing but now it is called PMC (Power Management Controller) instead of SCU. To make the IPC available for those split the driver into core part (intel_scu_ipc.c) and the SCU PCI driver part (intel_scu_pcidrv.c) which then calls the former before it goes and creates rest of the SCU devices. The SCU IPC will also register a new class that gets assigned to the device that is created under the parent PCI device. We also split the Kconfig symbols so that INTEL_SCU_IPC enables the SCU IPC library and INTEL_SCU_PCI the SCU driver and convert the users accordingly. While there remove default y from the INTEL_SCU_PCI symbol as it is already selected by X86_INTEL_MID. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_INTEL_SCU_IPC_H_
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#define _ASM_X86_INTEL_SCU_IPC_H_
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#include <linux/ioport.h>
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#include <linux/notifier.h>
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#define IPCMSG_INDIRECT_READ 0x02
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#define IPCMSG_INDIRECT_WRITE 0x05
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#define IPCMSG_COLD_OFF 0x80 /* Only for Tangier */
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#define IPCMSG_WARM_RESET 0xF0
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#define IPCMSG_COLD_RESET 0xF1
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#define IPCMSG_SOFT_RESET 0xF2
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#define IPCMSG_COLD_BOOT 0xF3
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#define IPCMSG_VRTC 0xFA /* Set vRTC device */
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/* Command id associated with message IPCMSG_VRTC */
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#define IPC_CMD_VRTC_SETTIME 1 /* Set time */
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#define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */
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struct device;
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struct intel_scu_ipc_dev;
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/**
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* struct intel_scu_ipc_data - Data used to configure SCU IPC
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* @mem: Base address of SCU IPC MMIO registers
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* @irq: The IRQ number used for SCU (optional)
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*/
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struct intel_scu_ipc_data {
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struct resource mem;
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int irq;
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};
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struct intel_scu_ipc_dev *
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intel_scu_ipc_register(struct device *parent,
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const struct intel_scu_ipc_data *scu_data);
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/* Read single register */
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int intel_scu_ipc_ioread8(u16 addr, u8 *data);
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/* Read a vector */
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int intel_scu_ipc_readv(u16 *addr, u8 *data, int len);
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/* Write single register */
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int intel_scu_ipc_iowrite8(u16 addr, u8 data);
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/* Write a vector */
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int intel_scu_ipc_writev(u16 *addr, u8 *data, int len);
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/* Update single register based on the mask */
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int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask);
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/* Issue commands to the SCU with or without data */
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int intel_scu_ipc_simple_command(int cmd, int sub);
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int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
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u32 *out, int outlen);
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extern struct blocking_notifier_head intel_scu_notifier;
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static inline void intel_scu_notifier_add(struct notifier_block *nb)
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{
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blocking_notifier_chain_register(&intel_scu_notifier, nb);
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}
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static inline void intel_scu_notifier_remove(struct notifier_block *nb)
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{
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blocking_notifier_chain_unregister(&intel_scu_notifier, nb);
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}
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static inline int intel_scu_notifier_post(unsigned long v, void *p)
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{
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return blocking_notifier_call_chain(&intel_scu_notifier, v, p);
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}
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#define SCU_AVAILABLE 1
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#define SCU_DOWN 2
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#endif
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