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48fe02478a
If we want to be able to hit the instmem fast-path in a few trickier cases, we need to be more flexible with when we can initialise BAR2 access. There's probably a decent case to be made for merging BAR/INSTMEM into BUS, but that's something to ponder another day. Flushes have been added after the write to bind the instance block, as later commits will reveal the need for them. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
61 lines
2 KiB
C
61 lines
2 KiB
C
/*
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* Copyright 2015 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs <bskeggs@redhat.com>
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*/
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#include "nv50.h"
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#include <subdev/timer.h>
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void
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g84_bar_flush(struct nvkm_bar *bar)
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{
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struct nvkm_device *device = bar->subdev.device;
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unsigned long flags;
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spin_lock_irqsave(&bar->lock, flags);
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nvkm_wr32(device, 0x070000, 0x00000001);
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nvkm_msec(device, 2000,
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if (!(nvkm_rd32(device, 0x070000) & 0x00000002))
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break;
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);
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spin_unlock_irqrestore(&bar->lock, flags);
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}
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static const struct nvkm_bar_func
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g84_bar_func = {
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.dtor = nv50_bar_dtor,
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.oneinit = nv50_bar_oneinit,
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.init = nv50_bar_init,
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.bar1.init = nv50_bar_bar1_init,
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.bar1.fini = nv50_bar_bar1_fini,
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.bar1.wait = nv50_bar_bar1_wait,
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.bar2.init = nv50_bar_bar2_init,
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.bar2.wait = nv50_bar_bar1_wait,
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.kmap = nv50_bar_kmap,
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.umap = nv50_bar_umap,
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.flush = g84_bar_flush,
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};
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int
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g84_bar_new(struct nvkm_device *device, int index, struct nvkm_bar **pbar)
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{
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return nv50_bar_new_(&g84_bar_func, device, index, 0x200, pbar);
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}
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