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45def22c1f
The control device for a nvdimm_bus is registered as an "nd" class device. The expectation is that there will usually only be one "nd" bus registered under /sys/class/nd. However, we allow for the possibility of multiple buses and they will listed in discovery order as ndctl0...ndctlN. This character device hosts the ioctl for passing control messages. The initial command set has a 1:1 correlation with the commands listed in the by the "NFIT DSM Example" document [1], but this scheme is extensible to future command sets. Note, nd_ioctl() and the backing ->ndctl() implementation are defined in a subsequent patch. This is simply the initial registrations and sysfs attributes. [1]: http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf Cc: Neil Brown <neilb@suse.de> Cc: Greg KH <gregkh@linuxfoundation.org> Cc: <linux-acpi@vger.kernel.org> Cc: Robert Moore <robert.moore@intel.com> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Christoph Hellwig <hch@lst.de> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: Toshi Kani <toshi.kani@hp.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
96 lines
2.3 KiB
C
96 lines
2.3 KiB
C
/*
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* NVDIMM Firmware Interface Table - NFIT
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*
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* Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#ifndef __NFIT_H__
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#define __NFIT_H__
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#include <linux/libnvdimm.h>
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#include <linux/types.h>
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#include <linux/uuid.h>
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#include <linux/acpi.h>
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#include <acpi/acuuid.h>
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#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
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#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
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enum nfit_uuids {
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NFIT_SPA_VOLATILE,
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NFIT_SPA_PM,
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NFIT_SPA_DCR,
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NFIT_SPA_BDW,
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NFIT_SPA_VDISK,
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NFIT_SPA_VCD,
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NFIT_SPA_PDISK,
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NFIT_SPA_PCD,
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NFIT_DEV_BUS,
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NFIT_DEV_DIMM,
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NFIT_UUID_MAX,
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};
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struct nfit_spa {
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struct acpi_nfit_system_address *spa;
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struct list_head list;
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};
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struct nfit_dcr {
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struct acpi_nfit_control_region *dcr;
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struct list_head list;
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};
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struct nfit_bdw {
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struct acpi_nfit_data_region *bdw;
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struct list_head list;
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};
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struct nfit_memdev {
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struct acpi_nfit_memory_map *memdev;
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struct list_head list;
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};
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/* assembled tables for a given dimm/memory-device */
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struct nfit_mem {
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struct acpi_nfit_memory_map *memdev_dcr;
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struct acpi_nfit_memory_map *memdev_pmem;
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struct acpi_nfit_control_region *dcr;
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struct acpi_nfit_data_region *bdw;
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struct acpi_nfit_system_address *spa_dcr;
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struct acpi_nfit_system_address *spa_bdw;
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struct list_head list;
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};
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struct acpi_nfit_desc {
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struct nvdimm_bus_descriptor nd_desc;
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struct acpi_table_nfit *nfit;
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struct list_head memdevs;
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struct list_head dimms;
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struct list_head spas;
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struct list_head dcrs;
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struct list_head bdws;
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struct nvdimm_bus *nvdimm_bus;
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struct device *dev;
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};
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static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
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struct nfit_mem *nfit_mem)
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{
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if (nfit_mem->memdev_dcr)
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return nfit_mem->memdev_dcr;
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return nfit_mem->memdev_pmem;
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}
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static inline struct acpi_nfit_desc *to_acpi_desc(
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struct nvdimm_bus_descriptor *nd_desc)
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{
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return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
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}
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#endif /* __NFIT_H__ */
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