linux/drivers/gpu/drm/amd/include
Eric Huang 6e58941cff drm/amd/pm: add a new sysfs entry for default power limit
Driver doesn't keep the default bootup power limit and expose it
to user. As requested we add it in driver.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23 23:30:55 -04:00
..
asic_reg drm/amdgpu: add vcn v2_6_0 ip headers (v3) 2021-03-10 00:01:20 -05:00
ivsrcid drm/amdgpu: add DMUB trace event IRQ source define 2021-03-05 15:10:49 -05:00
aldebaran_ip_offset.h drm/amd/include: add ip offset header for aldebaran (v5) 2021-03-10 00:01:29 -05:00
amd_acpi.h
amd_pcie.h drm/amdgpu:Add pcie gen5 support in pcie capability. 2021-01-21 09:54:56 -05:00
amd_pcie_helpers.h
amd_shared.h drm/amd/pm: enable DCS 2021-02-09 15:27:57 -05:00
arct_ip_offset.h drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
atom-bits.h
atom-names.h
atom-types.h
atombios.h
atomfirmware.h drm/amdgpu: update umc_info v3_3 structure for ECC 2021-03-23 23:29:31 -04:00
atomfirmwareid.h
cgs_common.h
cik_structs.h
dimgrey_cavefish_ip_offset.h drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
discovery.h
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h
kgd_pp_interface.h drm/amd/pm: add a new sysfs entry for default power limit 2021-03-23 23:30:55 -04:00
navi10_enum.h
navi10_ip_offset.h drm/amd/include/navi10_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi12_ip_offset.h drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi14_ip_offset.h drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
pptable.h
renoir_ip_offset.h drm/amd/include/renoir_ip_offset: Mark top-level IP_BASE as __maybe_unused 2021-01-14 13:20:20 -05:00
sienna_cichlid_ip_offset.h drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
soc15_hw_ip.h
soc15_ih_clientid.h drm/amdgpu: Fix IH client ID naming table 2021-03-23 22:53:22 -04:00
v9_structs.h
v10_structs.h
vangogh_ip_offset.h drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
vega10_enum.h
vega10_ip_offset.h drm/amd/include/vega10_ip_offset: Mark _BASE structs as __maybe_unused 2020-11-13 17:29:46 -05:00
vega20_ip_offset.h drm/amd/include/vega20_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
vi_structs.h drm/amdkfd: Check HIQ's MQD for queue preemption status 2021-03-23 22:59:25 -04:00