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linux/drivers/gpu/drm/amd/display
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Chris Park 41fd932e1a drm/amd/display: Update panel register 
[Why]
Incorrect panel register settings are applied for power sequence because
the register macro is not defined in resource.

[How]
Implement same register space to future resource files.

Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24 12:07:19 -05:00
..
amdgpu_dm drm/amd/display: Avoid HDCP initialization in devices without output 2020-11-24 12:04:47 -05:00
dc drm/amd/display: Update panel register 2020-11-24 12:07:19 -05:00
dmub drm/amd/display: [FW Promotion] Release 0.0.42 2020-11-16 12:19:38 -05:00
include drm/amd/display/dc/core/dc_link_ddc: Move DP_DVI_CONVERTER_ID_{4, 5} to where they're used 2020-11-13 17:29:46 -05:00
modules drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
Kconfig drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
Makefile
TODO