Jake Wang 410066d24c drm/amd/display: updated wm table for Renoir ... [Why] For certain timings, Renoir may underflow due to sr exit latency being too slow. [How] Updated wm table for renoir. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-12-15 11:34:23 -05:00
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amdgpu_dm	drm/amd/display: Fix to be able to stop crc calculation	2020-12-15 11:33:55 -05:00
dc	drm/amd/display: updated wm table for Renoir	2020-12-15 11:34:23 -05:00
dmub	drm/amd/display: [FW Promotion] Release 0.0.45	2020-12-08 23:05:06 -05:00
include	drm/amd/display: Add internal display info	2020-11-24 12:08:15 -05:00
modules	drm/amd/display: Set FixRate bit in VSIF V3	2020-12-08 23:03:04 -05:00
Kconfig	drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)	2020-11-04 17:11:37 -05:00
Makefile
TODO