Luben Tuikov 3b8164f808 drm/amdgpu: Decouple RAS EEPROM addresses from chips ... Abstract RAS I2C EEPROM addresses from chip names, and set their macro definition names to the address they set, not the chip they attach to. Since most chips either use I2C EEPROM address 0 or 40000h for the RAS table start offset, this leaves us with only two macro definitions as opposed to five, and removes the redundancy of four. Cc: Candice Li <candice.li@amd.com> Cc: Tao Zhou <tao.zhou1@amd.com> Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-11-09 17:41:42 -05:00
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acp
amdgpu	drm/amdgpu: Decouple RAS EEPROM addresses from chips	2022-11-09 17:41:42 -05:00
amdkfd	drm/amdkfd: Make kfd_fill_cache_non_crat_info() as static	2022-11-09 17:41:42 -05:00
display	drm/amd/display: 3.2.211	2022-11-09 17:41:41 -05:00
include	drm/amdgpu: Fix type of second parameter in odn_edit_dpm_table() callback	2022-11-04 16:05:53 -04:00
pm	drm/amd/pm: enable mode1 reset on smu_v13_0_10	2022-11-09 17:41:42 -05:00