Hawking Zhang 3a07101b04 drm/amdgpu: disable DRAM memory training when GECC is enabled ... GECC and G6 mem training are mutually exclusive functionalities. VBIOS/PSP will set the flag (BOOT_CFG_FEATURE_TWO_STAGE_DRAM_TRAINING) in runtime database to indicate whether dram memory training need to be disabled or not. For Navi1x families, two stage mem training is always enabled. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-06-11 16:06:21 -04:00
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drm	drm/amdgpu: disable DRAM memory training when GECC is enabled	2021-06-11 16:06:21 -04:00
host1x
ipu-v3
trace
vga	vgaarb: Use ACPI HID name to find integrated GPU	2021-05-20 14:55:56 -04:00
Makefile