Dave Airlie 5b8c596976 Merge tag 'amd-drm-next-5.11-2020-11-05' of git://people.freedesktop.org/~agd5f/linux into drm-next ... amd-drm-next-5.11-2020-11-05: amdgpu: - Add initial support for Vangogh - Add support for Green Sardine - Add initial support for Dimgrey Cavefish - Scatter/Gather display support for Renoir - Updates for Sienna Cichlid - Updates for Navy Flounder - SMU7 power improvements - Modifier support for gfx9+ - CI BACO fixes - Arcturus SMU fixes - Lots of code cleanups - DC fixes - Kernel doc fixes - Add more GPU HW client information to page fault error logging - MPO clock tuning for RV - FP fixes for DCN3 on ARM and PPC radeon: - Expose voltage via hwmon on Sumo APUs amdkfd: - Fix unique id handling - Misc fixes From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201105222749.201798-1-alexander.deucher@amd.com		2020-11-10 17:48:47 +10:00
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asic_reg	drm/amdgpu: add GC 10.3 NOALLOC registers	2020-10-23 15:33:47 -04:00
ivsrcid	drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2)	2020-06-03 13:52:03 -04:00
amd_acpi.h
amd_pcie.h
amd_pcie_helpers.h
amd_shared.h	drm/amdgpu: Add GFX Fine Grain Clock Gating flag	2020-11-04 17:08:08 -05:00
arct_ip_offset.h	drm/amd/include: adjust base offset of SMUIO and THM for Arcturus	2019-07-30 23:48:34 -05:00
atom-bits.h
atom-names.h
atom-types.h
atombios.h	drm/amd/pm: correct VR shared rail info	2020-10-27 11:58:57 -04:00
atomfirmware.h	drm/amdgpu: drop CONFIG_DRM_AMD_DC_DCN3_01 from atomfirmware.h	2020-10-30 01:02:10 -04:00
atomfirmwareid.h
cgs_common.h	drm/amdgpu: retire indirect mmio reg support from cgs	2020-04-09 10:43:18 -04:00
cik_structs.h
dimgrey_cavefish_ip_offset.h	drm/amdgpu: initialize IP offset for dimgrey_cavefish	2020-10-12 14:00:20 -04:00
discovery.h	drm/amdgpu/discovery: reserve discovery data at the top of VRAM	2019-10-15 15:48:46 -04:00
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h	drm next for 5.10-rc1	2020-10-15 10:46:16 -07:00
kgd_pp_interface.h	drm/amd/powerplay: add one sysfs file to support the feature to modify gfx clock on Raven/Raven2/Picasso APU.	2020-09-29 16:12:16 -04:00
navi10_enum.h
navi10_ip_offset.h
navi12_ip_offset.h	drm/amdgpu: Fix a typo in the include header guard of 'navi12_ip_offset.h'	2019-08-21 22:16:55 -05:00
navi14_ip_offset.h
pptable.h
renoir_ip_offset.h	drm/amd/display: Add DCN_BASE regs	2019-10-17 16:27:27 -04:00
sienna_cichlid_ip_offset.h	drm/amdgpu: initialize IP offset for sienna_cichlid (v2)	2020-06-03 13:52:00 -04:00
soc15_hw_ip.h
soc15_ih_clientid.h	drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid	2020-06-03 13:52:04 -04:00
v9_structs.h	drm/amdkfd: Extend CU mask to 8 SEs (v3)	2019-08-02 10:19:11 -05:00
v10_structs.h
vangogh_ip_offset.h	drm/amdgpu: add vangogh_reg_base_init function for van gogh	2020-10-05 15:14:02 -04:00
vega10_enum.h	drm/amdgpu: Support new arcturus mtype	2019-09-13 17:35:48 -05:00
vega10_ip_offset.h
vega20_ip_offset.h
vi_structs.h