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2bfdd113d0
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
84 lines
1.6 KiB
Text
84 lines
1.6 KiB
Text
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* support fot the imx6 based aristainetos board
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*
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* Copyright (C) 2014 Heiko Schocher <hs@denx.de>
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-aristainetos.dtsi"
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/ {
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model = "aristainetos i.MX6 Dual Lite Board 4";
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compatible = "fsl,imx6dl";
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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enable-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_backlight>;
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status = "okay";
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};
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memory@10000000 {
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device_type = "memory";
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reg = <0x10000000 0x40000000>;
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};
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display0: disp0 {
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compatible = "fsl,imx-parallel-display";
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interface-pix-fmt = "rgb24";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp>;
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status = "okay";
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display-timings {
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480x800p60 {
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native-mode;
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clock-frequency = <30000000>;
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hactive = <480>;
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vactive = <800>;
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hfront-porch = <59>;
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hback-porch = <10>;
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hsync-len = <10>;
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vback-porch = <15>;
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vfront-porch = <15>;
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vsync-len = <15>;
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hsync-active = <1>;
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vsync-active = <1>;
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};
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};
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port {
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display0_in: endpoint {
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remote-endpoint = <&ipu1_di0_disp0>;
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};
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};
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};
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};
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&ecspi2 {
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cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&ipu1_di0_disp0 {
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remote-endpoint = <&display0_in>;
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};
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&pwm1 {
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#pwm-cells = <2>;
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status = "okay";
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};
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