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380f3a8b63
Move to the common MMU memory cache implementation now that the common code and MIPS's existing code are semantically compatible. No functional change intended. Suggested-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Message-Id: <20200703023545.8771-22-sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
13 lines
366 B
Makefile
13 lines
366 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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# MIPS headers
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generated-y += syscall_table_32_o32.h
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generated-y += syscall_table_64_n32.h
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generated-y += syscall_table_64_n64.h
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generated-y += syscall_table_64_o32.h
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generic-y += export.h
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generic-y += local64.h
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generic-y += mcs_spinlock.h
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generic-y += parport.h
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generic-y += qrwlock.h
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generic-y += qspinlock.h
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generic-y += user.h
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