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3424a00fd5
These changes convert both rtl8192ce and rtl8192cu to use the new routine. Some additional definitions are needed in the core, thus several of the headers for other drivers are affected, but no other executable code is changed. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
88 lines
2.5 KiB
C
88 lines
2.5 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2009-2012 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __RTL_CORE_H__
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#define __RTL_CORE_H__
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#define RTL_SUPPORTED_FILTERS \
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(FIF_PROMISC_IN_BSS | \
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FIF_ALLMULTI | FIF_CONTROL | \
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FIF_OTHER_BSS | \
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FIF_FCSFAIL | \
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FIF_BCN_PRBRESP_PROMISC)
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#define RTL_SUPPORTED_CTRL_FILTER 0xFF
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#define DM_DIG_THRESH_HIGH 40
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#define DM_DIG_THRESH_LOW 35
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#define DM_FALSEALARM_THRESH_LOW 400
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#define DM_FALSEALARM_THRESH_HIGH 1000
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#define DM_DIG_MAX 0x3e
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#define DM_DIG_MIN 0x1e
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#define DM_DIG_BACKOFF_MAX 12
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#define DM_DIG_BACKOFF_MIN -4
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#define DM_DIG_BACKOFF_DEFAULT 10
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enum cck_packet_detection_threshold {
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CCK_PD_STAGE_LOWRSSI = 0,
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CCK_PD_STAGE_HIGHRSSI = 1,
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CCK_FA_STAGE_LOW = 2,
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CCK_FA_STAGE_HIGH = 3,
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CCK_PD_STAGE_MAX = 4,
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};
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enum dm_dig_ext_port_alg_e {
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DIG_EXT_PORT_STAGE_0 = 0,
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DIG_EXT_PORT_STAGE_1 = 1,
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DIG_EXT_PORT_STAGE_2 = 2,
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DIG_EXT_PORT_STAGE_3 = 3,
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DIG_EXT_PORT_STAGE_MAX = 4,
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};
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enum dm_dig_connect_e {
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DIG_STA_DISCONNECT,
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DIG_STA_CONNECT,
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DIG_STA_BEFORE_CONNECT,
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DIG_MULTISTA_DISCONNECT,
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DIG_MULTISTA_CONNECT,
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DIG_AP_DISCONNECT,
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DIG_AP_CONNECT,
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DIG_AP_ADD_STATION,
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DIG_CONNECT_MAX
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};
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extern const struct ieee80211_ops rtl_ops;
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void rtl_fw_cb(const struct firmware *firmware, void *context);
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void rtl_wowlan_fw_cb(const struct firmware *firmware, void *context);
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void rtl_addr_delay(u32 addr);
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void rtl_rfreg_delay(struct ieee80211_hw *hw, enum radio_path rfpath, u32 addr,
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u32 mask, u32 data);
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void rtl_bb_delay(struct ieee80211_hw *hw, u32 addr, u32 data);
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bool rtl_cmd_send_packet(struct ieee80211_hw *hw, struct sk_buff *skb);
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bool rtl_btc_status_false(void);
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void rtl_dm_diginit(struct ieee80211_hw *hw, u32 cur_igval);
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#endif
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