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33641994a6
The mv88e6390 changes the monitor control register into the Monitor and Management control, which is an indirection register to various registers. Add ops to set the CPU port and the ingress/egress port for both register layouts, to global1 Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
196 lines
4.5 KiB
C
196 lines
4.5 KiB
C
/*
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* Marvell 88E6xxx Switch Global (1) Registers support
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "mv88e6xxx.h"
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#include "global1.h"
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int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)
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{
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int addr = chip->info->global1_addr;
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return mv88e6xxx_read(chip, addr, reg, val);
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}
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int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val)
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{
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int addr = chip->info->global1_addr;
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return mv88e6xxx_write(chip, addr, reg, val);
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}
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int mv88e6xxx_g1_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask)
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{
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return mv88e6xxx_wait(chip, chip->info->global1_addr, reg, mask);
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}
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/* Offset 0x1a: Monitor Control */
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/* Offset 0x1a: Monitor & MGMT Control on some devices */
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int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
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{
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u16 reg;
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int err;
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err = mv88e6xxx_g1_read(chip, GLOBAL_MONITOR_CONTROL, ®);
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if (err)
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return err;
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reg &= ~(GLOBAL_MONITOR_CONTROL_INGRESS_MASK |
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GLOBAL_MONITOR_CONTROL_EGRESS_MASK);
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reg |= port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT;
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return mv88e6xxx_g1_write(chip, GLOBAL_MONITOR_CONTROL, reg);
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}
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/* Older generations also call this the ARP destination. It has been
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* generalized in more modern devices such that more than ARP can
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* egress it
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*/
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int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port)
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{
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u16 reg;
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int err;
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err = mv88e6xxx_g1_read(chip, GLOBAL_MONITOR_CONTROL, ®);
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if (err)
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return err;
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reg &= ~GLOBAL_MONITOR_CONTROL_ARP_MASK;
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reg |= port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
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return mv88e6xxx_g1_write(chip, GLOBAL_MONITOR_CONTROL, reg);
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}
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static int mv88e6390_g1_monitor_write(struct mv88e6xxx_chip *chip,
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u16 pointer, u8 data)
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{
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u16 reg;
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reg = GLOBAL_MONITOR_CONTROL_UPDATE | pointer | data;
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return mv88e6xxx_g1_write(chip, GLOBAL_MONITOR_CONTROL, reg);
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}
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int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
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{
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int err;
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err = mv88e6390_g1_monitor_write(chip, GLOBAL_MONITOR_CONTROL_INGRESS,
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port);
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if (err)
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return err;
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return mv88e6390_g1_monitor_write(chip, GLOBAL_MONITOR_CONTROL_EGRESS,
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port);
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}
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int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port)
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{
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return mv88e6390_g1_monitor_write(chip, GLOBAL_MONITOR_CONTROL_CPU_DEST,
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port);
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}
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/* Offset 0x1c: Global Control 2 */
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int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip)
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{
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u16 val;
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int err;
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err = mv88e6xxx_g1_read(chip, GLOBAL_CONTROL_2, &val);
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if (err)
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return err;
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val |= GLOBAL_CONTROL_2_HIST_RX_TX;
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err = mv88e6xxx_g1_write(chip, GLOBAL_CONTROL_2, val);
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return err;
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}
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/* Offset 0x1d: Statistics Operation 2 */
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int mv88e6xxx_g1_stats_wait(struct mv88e6xxx_chip *chip)
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{
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return mv88e6xxx_g1_wait(chip, GLOBAL_STATS_OP, GLOBAL_STATS_OP_BUSY);
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}
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int mv88e6xxx_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port)
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{
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int err;
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/* Snapshot the hardware statistics counters for this port. */
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err = mv88e6xxx_g1_write(chip, GLOBAL_STATS_OP,
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GLOBAL_STATS_OP_CAPTURE_PORT |
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GLOBAL_STATS_OP_HIST_RX_TX | port);
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if (err)
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return err;
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/* Wait for the snapshotting to complete. */
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return mv88e6xxx_g1_stats_wait(chip);
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}
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int mv88e6320_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port)
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{
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port = (port + 1) << 5;
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return mv88e6xxx_g1_stats_snapshot(chip, port);
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}
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int mv88e6390_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port)
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{
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int err;
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port = (port + 1) << 5;
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/* Snapshot the hardware statistics counters for this port. */
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err = mv88e6xxx_g1_write(chip, GLOBAL_STATS_OP,
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GLOBAL_STATS_OP_CAPTURE_PORT | port);
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if (err)
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return err;
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/* Wait for the snapshotting to complete. */
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return mv88e6xxx_g1_stats_wait(chip);
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}
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void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val)
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{
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u32 value;
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u16 reg;
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int err;
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*val = 0;
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err = mv88e6xxx_g1_write(chip, GLOBAL_STATS_OP,
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GLOBAL_STATS_OP_READ_CAPTURED | stat);
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if (err)
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return;
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err = mv88e6xxx_g1_stats_wait(chip);
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if (err)
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return;
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err = mv88e6xxx_g1_read(chip, GLOBAL_STATS_COUNTER_32, ®);
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if (err)
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return;
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value = reg << 16;
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err = mv88e6xxx_g1_read(chip, GLOBAL_STATS_COUNTER_01, ®);
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if (err)
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return;
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*val = value | reg;
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}
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