Christian König 30671b44aa drm/amdgpu: fix TLB flushing during eviction ... Testing the valid bit is not enough to figure out if we need to invalidate the TLB or not. During eviction it is quite likely that we move a BO from VRAM to GTT and update the page tables immediately to the new GTT address. Rework the whole function to get all the necessary parameters directly as value. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-04-05 10:26:20 -04:00
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drm	drm/amdgpu: fix TLB flushing during eviction	2022-04-05 10:26:20 -04:00
host1x	gpu: host1x: Fix a memory leak in 'host1x_remove()'	2022-03-01 11:13:09 +01:00
ipu-v3
trace
vga
Makefile