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2217f82437
Add CSI related nodes (i2c, irqsteer, csi, lpcg) for i.MX8 img subsystem. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
97 lines
1.6 KiB
Text
97 lines
1.6 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2021 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*/
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&csi1_pxl_lpcg {
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status = "disabled";
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};
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&csi1_core_lpcg {
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status = "disabled";
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};
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&csi1_esc_lpcg {
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status = "disabled";
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};
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&gpio0_mipi_csi1 {
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status = "disabled";
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};
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&i2c_mipi_csi1 {
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status = "disabled";
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};
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&irqsteer_csi1 {
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status = "disabled";
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};
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&isi {
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compatible = "fsl,imx8qxp-isi";
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reg = <0x58100000 0x60000>;
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interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pdma0_lpcg IMX_LPCG_CLK_0>,
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<&pdma1_lpcg IMX_LPCG_CLK_0>,
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<&pdma2_lpcg IMX_LPCG_CLK_0>,
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<&pdma3_lpcg IMX_LPCG_CLK_0>,
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<&pdma4_lpcg IMX_LPCG_CLK_0>,
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<&pdma5_lpcg IMX_LPCG_CLK_0>;
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clock-names = "per0", "per1", "per2", "per3", "per4", "per5";
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power-domains = <&pd IMX_SC_R_ISI_CH0>,
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<&pd IMX_SC_R_ISI_CH1>,
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<&pd IMX_SC_R_ISI_CH2>,
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<&pd IMX_SC_R_ISI_CH3>,
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<&pd IMX_SC_R_ISI_CH4>,
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<&pd IMX_SC_R_ISI_CH5>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@2 {
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reg = <2>;
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isi_in_2: endpoint {
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remote-endpoint = <&mipi_csi0_out>;
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};
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};
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};
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};
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&mipi_csi_0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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};
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port@1 {
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reg = <1>;
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mipi_csi0_out: endpoint {
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remote-endpoint = <&isi_in_2>;
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};
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};
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};
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};
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&jpegdec {
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compatible = "nxp,imx8qxp-jpgdec";
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};
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&jpegenc {
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compatible = "nxp,imx8qxp-jpgenc";
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};
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&mipi_csi_1 {
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status = "disabled";
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};
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