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c9cd961c0d
This patch enables the interrupts for internal phy link detection for LAN937x. The interrupt enable bits are active low. There is global interrupt mask for each port. And each port has the individual interrupt mask for TAS. QCI, SGMII, PTP, PHY and ACL. The first level of interrupt domain is registered for global port interrupt and second level of interrupt domain for the individual port interrupts. The phy interrupt is enabled in the lan937x_mdio_register function. Interrupt from which port is raised will be detected based on the interrupt host data. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| .. | ||
| b53 | ||
| hirschmann | ||
| microchip | ||
| mv88e6xxx | ||
| ocelot | ||
| qca | ||
| realtek | ||
| sja1105 | ||
| xrs700x | ||
| bcm_sf2.c | ||
| bcm_sf2.h | ||
| bcm_sf2_cfp.c | ||
| bcm_sf2_regs.h | ||
| dsa_loop.c | ||
| dsa_loop.h | ||
| dsa_loop_bdinfo.c | ||
| Kconfig | ||
| lan9303-core.c | ||
| lan9303.h | ||
| lan9303_i2c.c | ||
| lan9303_mdio.c | ||
| lantiq_gswip.c | ||
| lantiq_pce.h | ||
| Makefile | ||
| mt7530.c | ||
| mt7530.h | ||
| mv88e6060.c | ||
| mv88e6060.h | ||
| rzn1_a5psw.c | ||
| rzn1_a5psw.h | ||
| vitesse-vsc73xx-core.c | ||
| vitesse-vsc73xx-platform.c | ||
| vitesse-vsc73xx-spi.c | ||
| vitesse-vsc73xx.h | ||