Chaotian Jing 258bac4a61 mmc: mediatek: add bus_clk control ... when gate MSDC0_HCLK, access register will hang, even the MSDC driver will never accessing register after HCLK was gated, but for safety, need gate the bus_clk(which used to access register) too. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>		2018-10-08 12:53:24 +02:00
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core	mmc: core: Allow building PWRSEQ_SD8787 with LIBERTAS_SDIO	2018-10-08 11:40:43 +02:00
host	mmc: mediatek: add bus_clk control	2018-10-08 12:53:24 +02:00
Kconfig	mmc: core: Remove option not to use blk-mq	2017-12-11 12:55:02 +01:00
Makefile	mmc: Kconfig: downgrade CONFIG_MMC_DEBUG for host drivers only	2017-08-30 14:01:34 +02:00