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	 e050f160d4
			
		
	
	
		e050f160d4
		
	
	
	
	
		
			
			Replace a comma between expression statements by a semicolon. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210330111241.19401-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			191 lines
		
	
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			191 lines
		
	
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * Copyright (c) 2017, 2020-2021, The Linux Foundation. All rights reserved.
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|  */
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| 
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| #include <linux/device.h>
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| #include <linux/module.h>
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| #include <linux/of.h>
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| #include <linux/of_platform.h>
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| #include <linux/nvmem-provider.h>
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| #include <linux/regmap.h>
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| 
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| #define SDAM_MEM_START			0x40
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| #define REGISTER_MAP_ID			0x40
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| #define REGISTER_MAP_VERSION		0x41
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| #define SDAM_SIZE			0x44
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| #define SDAM_PBS_TRIG_SET		0xE5
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| #define SDAM_PBS_TRIG_CLR		0xE6
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| 
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| struct sdam_chip {
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| 	struct regmap			*regmap;
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| 	struct nvmem_config		sdam_config;
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| 	unsigned int			base;
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| 	unsigned int			size;
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| };
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| 
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| /* read only register offsets */
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| static const u8 sdam_ro_map[] = {
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| 	REGISTER_MAP_ID,
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| 	REGISTER_MAP_VERSION,
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| 	SDAM_SIZE
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| };
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| 
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| static bool sdam_is_valid(struct sdam_chip *sdam, unsigned int offset,
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| 				size_t len)
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| {
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| 	unsigned int sdam_mem_end = SDAM_MEM_START + sdam->size - 1;
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| 
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| 	if (!len)
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| 		return false;
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| 
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| 	if (offset >= SDAM_MEM_START && offset <= sdam_mem_end
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| 				&& (offset + len - 1) <= sdam_mem_end)
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| 		return true;
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| 	else if ((offset == SDAM_PBS_TRIG_SET || offset == SDAM_PBS_TRIG_CLR)
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| 				&& (len == 1))
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| 		return true;
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| 
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| 	return false;
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| }
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| 
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| static bool sdam_is_ro(unsigned int offset, size_t len)
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| {
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| 	int i;
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| 
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| 	for (i = 0; i < ARRAY_SIZE(sdam_ro_map); i++)
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| 		if (offset <= sdam_ro_map[i] && (offset + len) > sdam_ro_map[i])
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| 			return true;
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| 
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| 	return false;
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| }
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| 
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| static int sdam_read(void *priv, unsigned int offset, void *val,
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| 				size_t bytes)
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| {
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| 	struct sdam_chip *sdam = priv;
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| 	struct device *dev = sdam->sdam_config.dev;
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| 	int rc;
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| 
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| 	if (!sdam_is_valid(sdam, offset, bytes)) {
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| 		dev_err(dev, "Invalid SDAM offset %#x len=%zd\n",
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| 			offset, bytes);
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| 		return -EINVAL;
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| 	}
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| 
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| 	rc = regmap_bulk_read(sdam->regmap, sdam->base + offset, val, bytes);
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| 	if (rc < 0)
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| 		dev_err(dev, "Failed to read SDAM offset %#x len=%zd, rc=%d\n",
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| 						offset, bytes, rc);
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| 
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| 	return rc;
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| }
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| 
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| static int sdam_write(void *priv, unsigned int offset, void *val,
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| 				size_t bytes)
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| {
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| 	struct sdam_chip *sdam = priv;
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| 	struct device *dev = sdam->sdam_config.dev;
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| 	int rc;
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| 
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| 	if (!sdam_is_valid(sdam, offset, bytes)) {
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| 		dev_err(dev, "Invalid SDAM offset %#x len=%zd\n",
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| 			offset, bytes);
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| 		return -EINVAL;
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| 	}
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| 
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| 	if (sdam_is_ro(offset, bytes)) {
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| 		dev_err(dev, "Invalid write offset %#x len=%zd\n",
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| 			offset, bytes);
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| 		return -EINVAL;
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| 	}
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| 
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| 	rc = regmap_bulk_write(sdam->regmap, sdam->base + offset, val, bytes);
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| 	if (rc < 0)
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| 		dev_err(dev, "Failed to write SDAM offset %#x len=%zd, rc=%d\n",
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| 						offset, bytes, rc);
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| 
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| 	return rc;
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| }
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| 
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| static int sdam_probe(struct platform_device *pdev)
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| {
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| 	struct sdam_chip *sdam;
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| 	struct nvmem_device *nvmem;
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| 	unsigned int val;
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| 	int rc;
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| 
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| 	sdam = devm_kzalloc(&pdev->dev, sizeof(*sdam), GFP_KERNEL);
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| 	if (!sdam)
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| 		return -ENOMEM;
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| 
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| 	sdam->regmap = dev_get_regmap(pdev->dev.parent, NULL);
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| 	if (!sdam->regmap) {
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| 		dev_err(&pdev->dev, "Failed to get regmap handle\n");
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| 		return -ENXIO;
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| 	}
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| 
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| 	rc = of_property_read_u32(pdev->dev.of_node, "reg", &sdam->base);
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| 	if (rc < 0) {
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| 		dev_err(&pdev->dev, "Failed to get SDAM base, rc=%d\n", rc);
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| 		return -EINVAL;
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| 	}
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| 
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| 	rc = regmap_read(sdam->regmap, sdam->base + SDAM_SIZE, &val);
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| 	if (rc < 0) {
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| 		dev_err(&pdev->dev, "Failed to read SDAM_SIZE rc=%d\n", rc);
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| 		return -EINVAL;
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| 	}
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| 	sdam->size = val * 32;
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| 
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| 	sdam->sdam_config.dev = &pdev->dev;
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| 	sdam->sdam_config.name = "spmi_sdam";
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| 	sdam->sdam_config.id = NVMEM_DEVID_AUTO;
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| 	sdam->sdam_config.owner = THIS_MODULE;
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| 	sdam->sdam_config.stride = 1;
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| 	sdam->sdam_config.word_size = 1;
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| 	sdam->sdam_config.reg_read = sdam_read;
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| 	sdam->sdam_config.reg_write = sdam_write;
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| 	sdam->sdam_config.priv = sdam;
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| 
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| 	nvmem = devm_nvmem_register(&pdev->dev, &sdam->sdam_config);
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| 	if (IS_ERR(nvmem)) {
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| 		dev_err(&pdev->dev,
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| 			"Failed to register SDAM nvmem device rc=%ld\n",
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| 			PTR_ERR(nvmem));
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| 		return -ENXIO;
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| 	}
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| 	dev_dbg(&pdev->dev,
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| 		"SDAM base=%#x size=%u registered successfully\n",
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| 		sdam->base, sdam->size);
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| 
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| 	return 0;
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| }
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| 
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| static const struct of_device_id sdam_match_table[] = {
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| 	{ .compatible = "qcom,spmi-sdam" },
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| 	{},
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| };
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| 
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| static struct platform_driver sdam_driver = {
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| 	.driver = {
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| 		.name = "qcom,spmi-sdam",
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| 		.of_match_table = sdam_match_table,
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| 	},
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| 	.probe		= sdam_probe,
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| };
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| 
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| static int __init sdam_init(void)
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| {
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| 	return platform_driver_register(&sdam_driver);
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| }
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| subsys_initcall(sdam_init);
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| 
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| static void __exit sdam_exit(void)
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| {
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| 	return platform_driver_unregister(&sdam_driver);
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| }
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| module_exit(sdam_exit);
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| 
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| MODULE_DESCRIPTION("QCOM SPMI SDAM driver");
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| MODULE_LICENSE("GPL v2");
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