public-mirrors/linux
1
0
Fork 0
mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-08-05 16:54:27 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions
linux/drivers/gpu/drm/amd/include/asic_reg/gc
History
Joseph Greathouse 18c6b74e7c drm/amdgpu: Enable DISABLE_BARRIER_WAITCNT for Arcturus 
In previous gfx9 parts, S_BARRIER shader instructions are implicitly
S_WAITCNT 0 instructions as well. This setting turns off that
mechanism in Arcturus and beyond. With this, shaders must follow the
ISA guide insofar as putting in explicit S_WAITCNT operations even
after an S_BARRIER.

v2: Fix patch title to list component

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-30 17:15:27 -05:00
..
gc_9_0_default.h
gc_9_0_offset.h drm/amdgpu: Add mmCOMPUTE_STATIC_THREAD_MGMT_SE4-7 to support Arcturus 2019-12-23 14:56:37 -05:00
gc_9_0_sh_mask.h drm/amdgpu: Enable DISABLE_BARRIER_WAITCNT for Arcturus 2020-01-30 17:15:27 -05:00
gc_9_1_offset.h
gc_9_1_sh_mask.h
gc_9_2_1_offset.h
gc_9_2_1_sh_mask.h
gc_9_4_1_offset.h drm/amdgpu: add EDC counter registers of gc for Arcturus 2020-01-22 16:36:22 -05:00
gc_9_4_1_sh_mask.h drm/amdgpu: add EDC counter registers of gc for Arcturus 2020-01-22 16:36:22 -05:00
gc_10_1_0_default.h drm/amdgpu: add GC 10.1 register headers (v4) 2019-06-20 15:54:35 -05:00
gc_10_1_0_offset.h drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header 2019-08-02 10:30:40 -05:00
gc_10_1_0_sh_mask.h drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header 2019-08-02 10:30:40 -05:00