linux/drivers/gpu/drm/amd/include
Sathishkumar S 16eb48c62b drm/amdgpu: support atcs method powershift (v4)
add support to handle ATCS method for power shift control.
used to communicate dGPU device state to SBIOS.

V2: use defined acpi func for checking psc support (Lijo)
    fix alignment (Shashank)
V3: rebased on unified ATCS handling (Alex)
V4: rebased on ATPX/ATCS structures global (Alex)

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-01 22:36:48 -04:00
..
asic_reg drm/amdgpu: Query correct register for DF hashing on Aldebaran 2021-05-19 22:44:19 -04:00
ivsrcid drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flag 2021-04-09 16:54:42 -04:00
aldebaran_ip_offset.h drm/amd/include/aldebaran_ip_offset: Mark top-level IP_BASE as __maybe_unused 2021-05-21 10:32:16 -04:00
amd_acpi.h drm/amdgpu: support atcs method powershift (v4) 2021-06-01 22:36:48 -04:00
amd_pcie.h drm/amdgpu:Add pcie gen5 support in pcie capability. 2021-01-21 09:54:56 -05:00
amd_pcie_helpers.h
amd_shared.h drm/amdgpu: add judgement when add ip blocks (v2) 2021-05-19 22:29:22 -04:00
arct_ip_offset.h drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
atom-bits.h
atom-names.h
atom-types.h
atombios.h drm/amd: Fix a typo in two different sentences 2021-04-09 16:44:32 -04:00
atomfirmware.h drm/amdgpu: add helper function to query dynamic boot config cap 2021-05-19 22:30:14 -04:00
atomfirmwareid.h
beige_goby_ip_offset.h drm/amd/amdgpu: initialize IP offset for beige_goby 2021-05-19 22:40:09 -04:00
cgs_common.h
cik_structs.h
dimgrey_cavefish_ip_offset.h drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
discovery.h
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h
kgd_pp_interface.h drm/amdgpu/pm: Update metrics table (v2) 2021-05-21 10:31:30 -04:00
navi10_enum.h
navi10_ip_offset.h drm/amd/include/navi10_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi12_ip_offset.h drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi14_ip_offset.h drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
pptable.h
renoir_ip_offset.h drm/amd/include/renoir_ip_offset: Mark top-level IP_BASE as __maybe_unused 2021-01-14 13:20:20 -05:00
sienna_cichlid_ip_offset.h drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
soc15_hw_ip.h
soc15_ih_clientid.h drm/amdgpu: Fix IH client ID naming table 2021-03-23 22:53:22 -04:00
v9_structs.h
v10_structs.h
vangogh_ip_offset.h drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
vega10_enum.h
vega10_ip_offset.h
vega20_ip_offset.h drm/amd/include/vega20_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
vi_structs.h drm/amdkfd: Check HIQ's MQD for queue preemption status 2021-03-23 22:59:25 -04:00