Daniel Jurgens 16b0e0695a IB/mlx5: Use cache line size to select CQE stride ... When creating kernel CQs use 128B CQE stride if the cache line size is 128B, 64B otherwise. This prevents multiple CQEs from residing in a 128B cache line, which can cause retries when there are concurrent read and writes in one cache line. Tested with IPoIB on PPC64, saw ~5% throughput improvement. Fixes: e126ba97db ('mlx5: Add driver for Mellanox Connect-IB adapters') Signed-off-by: Daniel Jurgens <danielj@mellanox.com> Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>		2016-11-16 20:03:44 -05:00
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ah.c	IB/mlx5: Add RoCE fields to Address Vector	2015-12-23 12:07:37 -05:00
cq.c	IB/mlx5: Use cache line size to select CQE stride	2016-11-16 20:03:44 -05:00
doorbell.c	IB/mlx5: Fix Mellanox copyright note	2015-04-02 16:33:42 -04:00
gsi.c	IB/mlx5: Fix iteration overrun in GSI qps	2016-08-02 14:32:51 -04:00
ib_virt.c	IB/mlx5: Implement callbacks for manipulating VFs	2016-03-21 17:13:14 -04:00
Kconfig	net/mlx5: Extend mlx5_core to support ConnectX-4 Ethernet functionality	2015-05-30 18:24:51 -07:00
mad.c	IB/{core,hw}: Add constant for node_desc	2016-10-07 16:54:34 -04:00
main.c	IB/mlx5: Fix memory leak in query device	2016-11-16 20:03:44 -05:00
Makefile	IB/mlx5: Implement callbacks for manipulating VFs	2016-03-21 17:13:14 -04:00
mem.c	IB/mlx5: Fix the size parameter to find_first_bit	2016-09-02 13:46:12 -04:00
mlx5_ib.h	Merge of primary rdma-core code for 4.9	2016-10-09 17:04:33 -07:00
mr.c	IB/mlx5: Move and decouple user vendor structures	2016-10-07 16:54:34 -04:00
odp.c	IB/mlx5/odp: Remove deprecated create_singlethread_workqueue	2016-10-07 16:54:29 -04:00
qp.c	IB/mlx5: Validate requested RQT size	2016-11-16 20:03:44 -05:00
srq.c	IB/mlx5: Move and decouple user vendor structures	2016-10-07 16:54:34 -04:00