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0d90d0ddd1
This patch is to implement the processor fine grain feature for vangogh. It's similar with gfx clock, the only difference is below: echo "p core_id level value" > pp_od_clk_voltage 1. "p" - set the cclk (processor) frequency 2. "core_id" - 0/1/2/3, represents which cpu core you want to select 2. "level" - 0 or 1, "0" represents the min value, "1" represents the max value 3. "value" - the target value of cclk frequency, it should be limited in the safe range v2: fix some missing changes as Evan's suggestion. v3: add version check and fix the restore. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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|---|---|---|
| .. | ||
| asic_reg | ||
| ivsrcid | ||
| amd_acpi.h | ||
| amd_pcie.h | ||
| amd_pcie_helpers.h | ||
| amd_shared.h | ||
| arct_ip_offset.h | ||
| atom-bits.h | ||
| atom-names.h | ||
| atom-types.h | ||
| atombios.h | ||
| atomfirmware.h | ||
| atomfirmwareid.h | ||
| cgs_common.h | ||
| cik_structs.h | ||
| dimgrey_cavefish_ip_offset.h | ||
| discovery.h | ||
| displayobject.h | ||
| dm_pp_interface.h | ||
| kgd_kfd_interface.h | ||
| kgd_pp_interface.h | ||
| navi10_enum.h | ||
| navi10_ip_offset.h | ||
| navi12_ip_offset.h | ||
| navi14_ip_offset.h | ||
| pptable.h | ||
| renoir_ip_offset.h | ||
| sienna_cichlid_ip_offset.h | ||
| soc15_hw_ip.h | ||
| soc15_ih_clientid.h | ||
| v9_structs.h | ||
| v10_structs.h | ||
| vangogh_ip_offset.h | ||
| vega10_enum.h | ||
| vega10_ip_offset.h | ||
| vega20_ip_offset.h | ||
| vi_structs.h | ||