public-mirrors/linux
1
0
Fork 0
mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-08-05 16:54:27 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions
linux/drivers/gpu/drm/amd/display/dc/inc/hw
History
Jun Lei 0a25e8eb95 drm/amd/display: add support for per-state dummy-pstate latency 
[why]
Dummy pstate latency actually varies between different
UCLK frequencies, when calculating watermark C, if DAL
always assumes worst case, then it can lead to dummy
pstate not supported scenarios.

[how]
Rather than statically calculating dummy pstate using
worst case, we store the entire table of UCLK to dummy
pstate relationships.  On a per mode basis, we calculate
the actual UCLK lower limit, and use the dynamic worst
case dummy pstate latency.  This prevents the situation
where we don't support full p-state (which will force
high DPM), but still use low DPM dummy pstate latency.

Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:20 -04:00
..
abm.h drm/amd/display: Move panel_cntl specific register from abm to panel_cntl. 2020-05-05 13:10:46 -04:00
audio.h
aux_engine.h drm/amd/display: configurable aux timeout support 2019-10-17 16:24:56 -04:00
clk_mgr.h drm/amd/display: add support for per-state dummy-pstate latency 2020-07-01 01:59:20 -04:00
clk_mgr_internal.h drm/amd/display: Add DCN3 CLK_MGR 2020-07-01 01:59:14 -04:00
dccg.h drm/amd/display: DPP DTO isn't update properly. 2020-03-19 00:03:04 -04:00
dchubbub.h drm/amd/display: Add DCN3 HUBHUB 2020-07-01 01:59:14 -04:00
dmcu.h drm/amd/display: Change dmcu init sequence for dmcub loading dmcu FW. 2019-11-13 15:29:42 -05:00
dpp.h drm/amd/display: Add DCN3 DPP 2020-07-01 01:59:14 -04:00
dsc.h drm/amd/display: fix image corruption with ODM 2:1 DSC 2 slice 2020-03-05 00:29:57 -05:00
dwb.h drm/amd/display: Add DCN3 DWB 2020-07-01 01:59:14 -04:00
gpio.h drm/amd/display: refactor gpio to allocate hw_container in constructor 2019-08-15 10:53:55 -05:00
hubp.h drm/amd/display: Add DCN3 HUBP 2020-07-01 01:59:14 -04:00
hw_shared.h drm/amd/display: Add DCN3 Resource 2020-07-01 01:59:15 -04:00
ipp.h
link_encoder.h drm/amd/display: only include FEC overhead if both asic and display support FEC 2020-03-05 00:29:05 -05:00
mcif_wb.h drm/amd/display: Add DCN3 HWSEQ 2020-07-01 01:59:15 -04:00
mem_input.h drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag 2019-11-13 15:29:44 -05:00
mpc.h drm/amd/display: Add DCN3 MPC 2020-07-01 01:59:14 -04:00
opp.h drm/amd/display: program DPG_OFFSET_SEGMENT for odm_pipe 2020-03-05 00:29:47 -05:00
panel_cntl.h drm/amd/display: Move panel_cntl specific register from abm to panel_cntl. 2020-05-05 13:10:46 -04:00
stream_encoder.h drm/amd/display: Add DCN3 DIO 2020-07-01 01:59:14 -04:00
timing_generator.h drm/amd/display: Add DCN3 OPTC 2020-07-01 01:59:14 -04:00
transform.h drm/amd/display: fix dml pipe merge logic 2020-04-09 10:43:17 -04:00
vmid.h