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linux/arch/riscv/boot/dts/sophgo
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Chen Wang 08573ba006 riscv: dts: add resets property for uart node 
Add resets property for uart0 for completeness, although it is
deasserted by default.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/807f75e433a0f900da40ebb6a448349c98580072.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-02-23 12:38:03 +08:00
..
cv18xx.dtsi SoC: DT changes for 6.8 2024-01-11 11:23:17 -08:00
cv1800b-milkv-duo.dts riscv: dts: sophgo: add Milk-V Duo board device tree 2023-10-07 14:17:18 +01:00
cv1800b.dtsi riscv: dts: sophgo: Separate compatible specific for CV1800B soc 2023-11-30 12:40:36 +00:00
cv1812h-huashan-pi.dts riscv: dts: sophgo: add Huashan Pi board device tree 2023-11-30 12:40:36 +00:00
cv1812h.dtsi riscv: dts: sophgo: add initial CV1812H SoC device tree 2023-11-30 12:40:36 +00:00
Makefile riscv: dts: sophgo: add Huashan Pi board device tree 2023-11-30 12:40:36 +00:00
sg2042-cpus.dtsi
sg2042-milkv-pioneer.dts
sg2042.dtsi riscv: dts: add resets property for uart node 2024-02-23 12:38:03 +08:00