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0853f96f13
Ensure that our temporary page table entry is flushed from the TLB before we resume normal operations. This ensures that userspace won't trip over the stale TLB entry. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
21 lines
532 B
C
21 lines
532 B
C
#ifndef __ASM_ARM_SUSPEND_H
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#define __ASM_ARM_SUSPEND_H
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#include <asm/memory.h>
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#include <asm/tlbflush.h>
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extern void cpu_resume(void);
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/*
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* Hide the first two arguments to __cpu_suspend - these are an implementation
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* detail which platform code shouldn't have to know about.
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*/
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static inline void cpu_suspend(unsigned long arg, void (*fn)(unsigned long))
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{
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extern void __cpu_suspend(int, long, unsigned long,
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void (*)(unsigned long));
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__cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, arg, fn);
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flush_tlb_all();
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}
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#endif
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