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067353a46d
When the CXL region is formed, the driver computes the performance data for the region. However this data is not available at the node data collection that has been populated by the HMAT during kernel initialization. Add a memory hotplug notifier to update the access coordinates to the 'struct memory_target' context kept by the HMAT_REPORTING code. Add CXL_CALLBACK_PRI for a memory hotplug callback priority. Set the priority number to be called before HMAT_CALLBACK_PRI. The CXL update must happen before hmat_callback(). A new HMAT_REPORTING helper hmat_update_target_coordinates() is added in order to allow CXL to update the memory_target access coordinates. A new ext_updated member is added to the memory_target to indicate that the access coordinates within the memory_target has been updated by an external agent such as CXL. This prevents data being overwritten by the hmat_update_target_attrs() triggered by hmat_callback(). Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Rafael J. Wysocki <rafael@kernel.org> Reviewed-by: Huang, Ying <ying.huang@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20240308220055.2172956-12-dave.jiang@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
96 lines
3.1 KiB
C
96 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright(c) 2020 Intel Corporation. */
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#ifndef __CXL_CORE_H__
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#define __CXL_CORE_H__
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extern const struct device_type cxl_nvdimm_bridge_type;
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extern const struct device_type cxl_nvdimm_type;
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extern const struct device_type cxl_pmu_type;
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extern struct attribute_group cxl_base_attribute_group;
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#ifdef CONFIG_CXL_REGION
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extern struct device_attribute dev_attr_create_pmem_region;
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extern struct device_attribute dev_attr_create_ram_region;
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extern struct device_attribute dev_attr_delete_region;
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extern struct device_attribute dev_attr_region;
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extern const struct device_type cxl_pmem_region_type;
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extern const struct device_type cxl_dax_region_type;
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extern const struct device_type cxl_region_type;
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void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled);
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#define CXL_REGION_ATTR(x) (&dev_attr_##x.attr)
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#define CXL_REGION_TYPE(x) (&cxl_region_type)
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#define SET_CXL_REGION_ATTR(x) (&dev_attr_##x.attr),
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#define CXL_PMEM_REGION_TYPE(x) (&cxl_pmem_region_type)
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#define CXL_DAX_REGION_TYPE(x) (&cxl_dax_region_type)
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int cxl_region_init(void);
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void cxl_region_exit(void);
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int cxl_get_poison_by_endpoint(struct cxl_port *port);
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#else
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static inline int cxl_get_poison_by_endpoint(struct cxl_port *port)
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{
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return 0;
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}
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static inline void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled)
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{
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}
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static inline int cxl_region_init(void)
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{
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return 0;
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}
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static inline void cxl_region_exit(void)
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{
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}
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#define CXL_REGION_ATTR(x) NULL
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#define CXL_REGION_TYPE(x) NULL
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#define SET_CXL_REGION_ATTR(x)
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#define CXL_PMEM_REGION_TYPE(x) NULL
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#define CXL_DAX_REGION_TYPE(x) NULL
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#endif
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struct cxl_send_command;
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struct cxl_mem_query_commands;
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int cxl_query_cmd(struct cxl_memdev *cxlmd,
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struct cxl_mem_query_commands __user *q);
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int cxl_send_cmd(struct cxl_memdev *cxlmd, struct cxl_send_command __user *s);
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void __iomem *devm_cxl_iomap_block(struct device *dev, resource_size_t addr,
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resource_size_t length);
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struct dentry *cxl_debugfs_create_dir(const char *dir);
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int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
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enum cxl_decoder_mode mode);
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int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size);
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int cxl_dpa_free(struct cxl_endpoint_decoder *cxled);
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resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled);
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resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled);
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enum cxl_rcrb {
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CXL_RCRB_DOWNSTREAM,
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CXL_RCRB_UPSTREAM,
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};
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struct cxl_rcrb_info;
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resource_size_t __rcrb_to_component(struct device *dev,
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struct cxl_rcrb_info *ri,
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enum cxl_rcrb which);
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u16 cxl_rcrb_to_aer(struct device *dev, resource_size_t rcrb);
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extern struct rw_semaphore cxl_dpa_rwsem;
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extern struct rw_semaphore cxl_region_rwsem;
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int cxl_memdev_init(void);
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void cxl_memdev_exit(void);
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void cxl_mbox_init(void);
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enum cxl_poison_trace_type {
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CXL_POISON_TRACE_LIST,
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CXL_POISON_TRACE_INJECT,
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CXL_POISON_TRACE_CLEAR,
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};
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long cxl_pci_get_latency(struct pci_dev *pdev);
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int cxl_update_hmat_access_coordinates(int nid, struct cxl_region *cxlr,
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enum access_coordinate_class access);
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#endif /* __CXL_CORE_H__ */
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