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linux/tools/testing/selftests/kvm/riscv
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Atish Patra f80e9cc5c6 KVM: riscv: selftests: Add vector extension tests 
Add vector related tests with the ISA extension standard template.
However, the vector registers are bit tricky as the register length is
variable based on vlenb value of the system. That's why the macros are
defined with a default and overidden with actual value at runtime.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20250430-kvm_selftest_improve-v3-3-eea270ff080b@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
2025-05-21 09:34:40 +05:30
..
arch_timer.c KVM: riscv: selftests: Align the trap information wiht pt_regs 2025-05-21 09:34:35 +05:30
ebreak_test.c KVM: riscv: selftests: Align the trap information wiht pt_regs 2025-05-21 09:34:35 +05:30
get-reg-list.c KVM: riscv: selftests: Add vector extension tests 2025-05-21 09:34:40 +05:30
sbi_pmu_test.c KVM: riscv: selftests: Decode stval to identify exact exception type 2025-05-21 09:34:37 +05:30