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During the initial mprotect(RO) stage of mmu_stress_test, keep vCPUs
spinning until all vCPUs have hit -EFAULT, i.e. until all vCPUs have tried
to write to a read-only page. If a vCPU manages to complete an entire
iteration of the loop without hitting a read-only page, *and* the vCPU
observes mprotect_ro_done before starting a second iteration, then the
vCPU will prematurely fall through to GUEST_SYNC(3) (on x86 and arm64) and
get out of sequence.
Replace the "do-while (!r)" loop around the associated _vcpu_run() with
a single invocation, as barring a KVM bug, the vCPU is guaranteed to hit
-EFAULT, and retrying on success is super confusion, hides KVM bugs, and
complicates this fix. The do-while loop was semi-unintentionally added
specifically to fudge around a KVM x86 bug, and said bug is unhittable
without modifying the test to force x86 down the !(x86||arm64) path.
On x86, if forced emulation is enabled, vcpu_arch_put_guest() may trigger
emulation of the store to memory. Due a (very, very) longstanding bug in
KVM x86's emulator, emulate writes to guest memory that fail during
__kvm_write_guest_page() unconditionally return KVM_EXIT_MMIO. While that
is desirable in the !memslot case, it's wrong in this case as the failure
happens due to __copy_to_user() hitting a read-only page, not an emulated
MMIO region.
But as above, x86 only uses vcpu_arch_put_guest() if the __x86_64__ guards
are clobbered to force x86 down the common path, and of course the
unexpected MMIO is a KVM bug, i.e. *should* cause a test failure.
Fixes: b6c304aec6
("KVM: selftests: Verify KVM correctly handles mprotect(PROT_READ)")
Reported-by: Yan Zhao <yan.y.zhao@intel.com>
Closes: https://lore.kernel.org/all/20250208105318.16861-1-yan.y.zhao@intel.com
Debugged-by: Yan Zhao <yan.y.zhao@intel.com>
Reviewed-by: Yan Zhao <yan.y.zhao@intel.com>
Tested-by: Yan Zhao <yan.y.zhao@intel.com>
Link: https://lore.kernel.org/r/20250228230804.3845860-1-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
426 lines
12 KiB
C
426 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <stdio.h>
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#include <stdlib.h>
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#include <pthread.h>
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#include <semaphore.h>
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#include <sys/types.h>
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#include <signal.h>
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#include <errno.h>
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#include <linux/bitmap.h>
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#include <linux/bitops.h>
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#include <linux/atomic.h>
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#include <linux/sizes.h>
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#include "kvm_util.h"
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#include "test_util.h"
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#include "guest_modes.h"
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#include "processor.h"
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#include "ucall_common.h"
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static bool mprotect_ro_done;
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static bool all_vcpus_hit_ro_fault;
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static void guest_code(uint64_t start_gpa, uint64_t end_gpa, uint64_t stride)
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{
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uint64_t gpa;
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int i;
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for (i = 0; i < 2; i++) {
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for (gpa = start_gpa; gpa < end_gpa; gpa += stride)
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vcpu_arch_put_guest(*((volatile uint64_t *)gpa), gpa);
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GUEST_SYNC(i);
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}
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for (gpa = start_gpa; gpa < end_gpa; gpa += stride)
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*((volatile uint64_t *)gpa);
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GUEST_SYNC(2);
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/*
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* Write to the region while mprotect(PROT_READ) is underway. Keep
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* looping until the memory is guaranteed to be read-only and a fault
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* has occurred, otherwise vCPUs may complete their writes and advance
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* to the next stage prematurely.
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*
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* For architectures that support skipping the faulting instruction,
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* generate the store via inline assembly to ensure the exact length
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* of the instruction is known and stable (vcpu_arch_put_guest() on
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* fixed-length architectures should work, but the cost of paranoia
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* is low in this case). For x86, hand-code the exact opcode so that
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* there is no room for variability in the generated instruction.
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*/
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do {
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for (gpa = start_gpa; gpa < end_gpa; gpa += stride)
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#ifdef __x86_64__
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asm volatile(".byte 0x48,0x89,0x00" :: "a"(gpa) : "memory"); /* mov %rax, (%rax) */
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#elif defined(__aarch64__)
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asm volatile("str %0, [%0]" :: "r" (gpa) : "memory");
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#else
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vcpu_arch_put_guest(*((volatile uint64_t *)gpa), gpa);
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#endif
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} while (!READ_ONCE(mprotect_ro_done) || !READ_ONCE(all_vcpus_hit_ro_fault));
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/*
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* Only architectures that write the entire range can explicitly sync,
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* as other architectures will be stuck on the write fault.
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*/
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#if defined(__x86_64__) || defined(__aarch64__)
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GUEST_SYNC(3);
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#endif
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for (gpa = start_gpa; gpa < end_gpa; gpa += stride)
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vcpu_arch_put_guest(*((volatile uint64_t *)gpa), gpa);
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GUEST_SYNC(4);
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GUEST_ASSERT(0);
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}
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struct vcpu_info {
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struct kvm_vcpu *vcpu;
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uint64_t start_gpa;
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uint64_t end_gpa;
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};
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static int nr_vcpus;
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static atomic_t rendezvous;
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static atomic_t nr_ro_faults;
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static void rendezvous_with_boss(void)
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{
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int orig = atomic_read(&rendezvous);
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if (orig > 0) {
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atomic_dec_and_test(&rendezvous);
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while (atomic_read(&rendezvous) > 0)
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cpu_relax();
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} else {
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atomic_inc(&rendezvous);
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while (atomic_read(&rendezvous) < 0)
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cpu_relax();
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}
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}
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static void assert_sync_stage(struct kvm_vcpu *vcpu, int stage)
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{
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struct ucall uc;
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TEST_ASSERT_EQ(get_ucall(vcpu, &uc), UCALL_SYNC);
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TEST_ASSERT_EQ(uc.args[1], stage);
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}
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static void run_vcpu(struct kvm_vcpu *vcpu, int stage)
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{
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vcpu_run(vcpu);
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assert_sync_stage(vcpu, stage);
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}
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static void *vcpu_worker(void *data)
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{
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struct kvm_sregs __maybe_unused sregs;
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struct vcpu_info *info = data;
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struct kvm_vcpu *vcpu = info->vcpu;
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struct kvm_vm *vm = vcpu->vm;
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int r;
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vcpu_args_set(vcpu, 3, info->start_gpa, info->end_gpa, vm->page_size);
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rendezvous_with_boss();
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/* Stage 0, write all of guest memory. */
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run_vcpu(vcpu, 0);
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rendezvous_with_boss();
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#ifdef __x86_64__
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vcpu_sregs_get(vcpu, &sregs);
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/* Toggle CR0.WP to trigger a MMU context reset. */
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sregs.cr0 ^= X86_CR0_WP;
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vcpu_sregs_set(vcpu, &sregs);
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#endif
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rendezvous_with_boss();
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/* Stage 1, re-write all of guest memory. */
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run_vcpu(vcpu, 1);
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rendezvous_with_boss();
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/* Stage 2, read all of guest memory, which is now read-only. */
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run_vcpu(vcpu, 2);
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/*
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* Stage 3, write guest memory and verify KVM returns -EFAULT for once
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* the mprotect(PROT_READ) lands. Only architectures that support
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* validating *all* of guest memory sync for this stage, as vCPUs will
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* be stuck on the faulting instruction for other architectures. Go to
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* stage 3 without a rendezvous
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*/
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r = _vcpu_run(vcpu);
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TEST_ASSERT(r == -1 && errno == EFAULT,
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"Expected EFAULT on write to RO memory, got r = %d, errno = %d", r, errno);
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atomic_inc(&nr_ro_faults);
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if (atomic_read(&nr_ro_faults) == nr_vcpus) {
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WRITE_ONCE(all_vcpus_hit_ro_fault, true);
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sync_global_to_guest(vm, all_vcpus_hit_ro_fault);
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}
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#if defined(__x86_64__) || defined(__aarch64__)
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/*
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* Verify *all* writes from the guest hit EFAULT due to the VMA now
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* being read-only. x86 and arm64 only at this time as skipping the
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* instruction that hits the EFAULT requires advancing the program
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* counter, which is arch specific and relies on inline assembly.
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*/
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#ifdef __x86_64__
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vcpu->run->kvm_valid_regs = KVM_SYNC_X86_REGS;
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#endif
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for (;;) {
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r = _vcpu_run(vcpu);
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if (!r)
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break;
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TEST_ASSERT_EQ(errno, EFAULT);
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#if defined(__x86_64__)
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WRITE_ONCE(vcpu->run->kvm_dirty_regs, KVM_SYNC_X86_REGS);
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vcpu->run->s.regs.regs.rip += 3;
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#elif defined(__aarch64__)
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vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc),
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vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc)) + 4);
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#endif
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}
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assert_sync_stage(vcpu, 3);
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#endif /* __x86_64__ || __aarch64__ */
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rendezvous_with_boss();
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/*
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* Stage 4. Run to completion, waiting for mprotect(PROT_WRITE) to
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* make the memory writable again.
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*/
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do {
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r = _vcpu_run(vcpu);
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} while (r && errno == EFAULT);
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TEST_ASSERT_EQ(r, 0);
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assert_sync_stage(vcpu, 4);
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rendezvous_with_boss();
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return NULL;
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}
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static pthread_t *spawn_workers(struct kvm_vm *vm, struct kvm_vcpu **vcpus,
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uint64_t start_gpa, uint64_t end_gpa)
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{
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struct vcpu_info *info;
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uint64_t gpa, nr_bytes;
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pthread_t *threads;
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int i;
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threads = malloc(nr_vcpus * sizeof(*threads));
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TEST_ASSERT(threads, "Failed to allocate vCPU threads");
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info = malloc(nr_vcpus * sizeof(*info));
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TEST_ASSERT(info, "Failed to allocate vCPU gpa ranges");
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nr_bytes = ((end_gpa - start_gpa) / nr_vcpus) &
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~((uint64_t)vm->page_size - 1);
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TEST_ASSERT(nr_bytes, "C'mon, no way you have %d CPUs", nr_vcpus);
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for (i = 0, gpa = start_gpa; i < nr_vcpus; i++, gpa += nr_bytes) {
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info[i].vcpu = vcpus[i];
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info[i].start_gpa = gpa;
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info[i].end_gpa = gpa + nr_bytes;
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pthread_create(&threads[i], NULL, vcpu_worker, &info[i]);
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}
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return threads;
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}
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static void rendezvous_with_vcpus(struct timespec *time, const char *name)
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{
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int i, rendezvoused;
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pr_info("Waiting for vCPUs to finish %s...\n", name);
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rendezvoused = atomic_read(&rendezvous);
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for (i = 0; abs(rendezvoused) != 1; i++) {
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usleep(100);
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if (!(i & 0x3f))
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pr_info("\r%d vCPUs haven't rendezvoused...",
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abs(rendezvoused) - 1);
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rendezvoused = atomic_read(&rendezvous);
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}
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clock_gettime(CLOCK_MONOTONIC, time);
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/* Release the vCPUs after getting the time of the previous action. */
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pr_info("\rAll vCPUs finished %s, releasing...\n", name);
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if (rendezvoused > 0)
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atomic_set(&rendezvous, -nr_vcpus - 1);
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else
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atomic_set(&rendezvous, nr_vcpus + 1);
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}
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static void calc_default_nr_vcpus(void)
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{
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cpu_set_t possible_mask;
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int r;
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r = sched_getaffinity(0, sizeof(possible_mask), &possible_mask);
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TEST_ASSERT(!r, "sched_getaffinity failed, errno = %d (%s)",
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errno, strerror(errno));
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nr_vcpus = CPU_COUNT(&possible_mask) * 3/4;
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TEST_ASSERT(nr_vcpus > 0, "Uh, no CPUs?");
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}
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int main(int argc, char *argv[])
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{
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/*
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* Skip the first 4gb and slot0. slot0 maps <1gb and is used to back
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* the guest's code, stack, and page tables. Because selftests creates
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* an IRQCHIP, a.k.a. a local APIC, KVM creates an internal memslot
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* just below the 4gb boundary. This test could create memory at
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* 1gb-3gb,but it's simpler to skip straight to 4gb.
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*/
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const uint64_t start_gpa = SZ_4G;
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const int first_slot = 1;
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struct timespec time_start, time_run1, time_reset, time_run2, time_ro, time_rw;
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uint64_t max_gpa, gpa, slot_size, max_mem, i;
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int max_slots, slot, opt, fd;
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bool hugepages = false;
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struct kvm_vcpu **vcpus;
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pthread_t *threads;
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struct kvm_vm *vm;
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void *mem;
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/*
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* Default to 2gb so that maxing out systems with MAXPHADDR=46, which
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* are quite common for x86, requires changing only max_mem (KVM allows
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* 32k memslots, 32k * 2gb == ~64tb of guest memory).
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*/
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slot_size = SZ_2G;
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max_slots = kvm_check_cap(KVM_CAP_NR_MEMSLOTS);
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TEST_ASSERT(max_slots > first_slot, "KVM is broken");
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/* All KVM MMUs should be able to survive a 128gb guest. */
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max_mem = 128ull * SZ_1G;
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calc_default_nr_vcpus();
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while ((opt = getopt(argc, argv, "c:h:m:s:H")) != -1) {
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switch (opt) {
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case 'c':
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nr_vcpus = atoi_positive("Number of vCPUs", optarg);
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break;
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case 'm':
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max_mem = 1ull * atoi_positive("Memory size", optarg) * SZ_1G;
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break;
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case 's':
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slot_size = 1ull * atoi_positive("Slot size", optarg) * SZ_1G;
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break;
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case 'H':
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hugepages = true;
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break;
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case 'h':
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default:
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printf("usage: %s [-c nr_vcpus] [-m max_mem_in_gb] [-s slot_size_in_gb] [-H]\n", argv[0]);
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exit(1);
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}
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}
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vcpus = malloc(nr_vcpus * sizeof(*vcpus));
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TEST_ASSERT(vcpus, "Failed to allocate vCPU array");
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vm = __vm_create_with_vcpus(VM_SHAPE_DEFAULT, nr_vcpus,
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#ifdef __x86_64__
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max_mem / SZ_1G,
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#else
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max_mem / vm_guest_mode_params[VM_MODE_DEFAULT].page_size,
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#endif
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guest_code, vcpus);
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max_gpa = vm->max_gfn << vm->page_shift;
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TEST_ASSERT(max_gpa > (4 * slot_size), "MAXPHYADDR <4gb ");
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fd = kvm_memfd_alloc(slot_size, hugepages);
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mem = mmap(NULL, slot_size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
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TEST_ASSERT(mem != MAP_FAILED, "mmap() failed");
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TEST_ASSERT(!madvise(mem, slot_size, MADV_NOHUGEPAGE), "madvise() failed");
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/* Pre-fault the memory to avoid taking mmap_sem on guest page faults. */
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for (i = 0; i < slot_size; i += vm->page_size)
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((uint8_t *)mem)[i] = 0xaa;
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gpa = 0;
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for (slot = first_slot; slot < max_slots; slot++) {
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gpa = start_gpa + ((slot - first_slot) * slot_size);
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if (gpa + slot_size > max_gpa)
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break;
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if ((gpa - start_gpa) >= max_mem)
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break;
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vm_set_user_memory_region(vm, slot, 0, gpa, slot_size, mem);
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#ifdef __x86_64__
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/* Identity map memory in the guest using 1gb pages. */
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for (i = 0; i < slot_size; i += SZ_1G)
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__virt_pg_map(vm, gpa + i, gpa + i, PG_LEVEL_1G);
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#else
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for (i = 0; i < slot_size; i += vm->page_size)
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virt_pg_map(vm, gpa + i, gpa + i);
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#endif
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}
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atomic_set(&rendezvous, nr_vcpus + 1);
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threads = spawn_workers(vm, vcpus, start_gpa, gpa);
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free(vcpus);
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vcpus = NULL;
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pr_info("Running with %lugb of guest memory and %u vCPUs\n",
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(gpa - start_gpa) / SZ_1G, nr_vcpus);
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rendezvous_with_vcpus(&time_start, "spawning");
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rendezvous_with_vcpus(&time_run1, "run 1");
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rendezvous_with_vcpus(&time_reset, "reset");
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rendezvous_with_vcpus(&time_run2, "run 2");
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mprotect(mem, slot_size, PROT_READ);
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mprotect_ro_done = true;
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sync_global_to_guest(vm, mprotect_ro_done);
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rendezvous_with_vcpus(&time_ro, "mprotect RO");
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mprotect(mem, slot_size, PROT_READ | PROT_WRITE);
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rendezvous_with_vcpus(&time_rw, "mprotect RW");
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time_rw = timespec_sub(time_rw, time_ro);
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time_ro = timespec_sub(time_ro, time_run2);
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time_run2 = timespec_sub(time_run2, time_reset);
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time_reset = timespec_sub(time_reset, time_run1);
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time_run1 = timespec_sub(time_run1, time_start);
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pr_info("run1 = %ld.%.9lds, reset = %ld.%.9lds, run2 = %ld.%.9lds, "
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"ro = %ld.%.9lds, rw = %ld.%.9lds\n",
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time_run1.tv_sec, time_run1.tv_nsec,
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time_reset.tv_sec, time_reset.tv_nsec,
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time_run2.tv_sec, time_run2.tv_nsec,
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time_ro.tv_sec, time_ro.tv_nsec,
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time_rw.tv_sec, time_rw.tv_nsec);
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/*
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* Delete even numbered slots (arbitrary) and unmap the first half of
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* the backing (also arbitrary) to verify KVM correctly drops all
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* references to the removed regions.
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*/
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for (slot = (slot - 1) & ~1ull; slot >= first_slot; slot -= 2)
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vm_set_user_memory_region(vm, slot, 0, 0, 0, NULL);
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munmap(mem, slot_size / 2);
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/* Sanity check that the vCPUs actually ran. */
|
|
for (i = 0; i < nr_vcpus; i++)
|
|
pthread_join(threads[i], NULL);
|
|
|
|
/*
|
|
* Deliberately exit without deleting the remaining memslots or closing
|
|
* kvm_fd to test cleanup via mmu_notifier.release.
|
|
*/
|
|
}
|