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fa1332a801
'perf mem/c2c' uses IBS Op PMU on AMD platforms. IBS Op PMU on Zen5 uarch has added support for Load Latency filtering. Implement 'perf mem/c2c' --ldlat using IBS Op Load Latency filtering capability. Some subtle differences between AMD and other arch: o --ldlat is disabled by default on AMD o Supported values are 128 to 2048. Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Ananth Narayan <ananth.narayan@amd.com> Cc: Ian Rogers <irogers@google.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Joe Mario <jmario@redhat.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sandipan Das <sandipan.das@amd.com> Cc: Santosh Shukla <santosh.shukla@amd.com> Cc: Stephane Eranian <eranian@google.com> Link: https://lore.kernel.org/r/20250429035938.1301-4-ravi.bangoria@amd.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
11 lines
427 B
C
11 lines
427 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _X86_MEM_EVENTS_H
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#define _X86_MEM_EVENTS_H
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extern struct perf_mem_event perf_mem_events_intel[PERF_MEM_EVENTS__MAX];
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extern struct perf_mem_event perf_mem_events_intel_aux[PERF_MEM_EVENTS__MAX];
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extern struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENTS__MAX];
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extern struct perf_mem_event perf_mem_events_amd_ldlat[PERF_MEM_EVENTS__MAX];
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#endif /* _X86_MEM_EVENTS_H */
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