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Linus Torvalds a6ff0d85eb RISC-V updates for v6.18-rc7 
- Correct the MIPS RISC-V/JEDEC vendor ID.
 
 - Fix the system shutdown behavior in the legacy case where
   CONFIG_RISCV_SBI_V01 is set, but the firmware implementation doesn't
   support the older v0.1 system shutdown method.
 
 - Align some tools/ macro definitions with the corresponding kernel headers.
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Merge tag 'riscv-for-linus-6.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:

 - Correct the MIPS RISC-V/JEDEC vendor ID

 - Fix the system shutdown behavior in the legacy case where
   CONFIG_RISCV_SBI_V01 is set, but the firmware implementation
   doesn't support the older v0.1 system shutdown method

 - Align some tools/ macro definitions with the corresponding
   kernel headers

* tag 'riscv-for-linus-6.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  tools: riscv: Fixed misalignment of CSR related definitions
  riscv: sbi: Prefer SRST shutdown over legacy
  riscv: Update MIPS vendor id to 0x127
2025-11-22 09:44:50 -08:00
..
alpha/include
arc/include/uapi/asm
arm/include
arm64
csky/include/uapi/asm
hexagon/include/uapi/asm
loongarch/include
microblaze/include/uapi/asm
mips/include
parisc/include/uapi/asm
powerpc/include
riscv/include tools: riscv: Fixed misalignment of CSR related definitions 2025-11-16 10:37:38 -07:00
s390/include
sh/include
sparc/include
x86 tools headers UAPI: Sync KVM's vmx.h with the kernel to pick SEAMCALL exit reason 2025-11-13 17:16:34 -03:00
xtensa/include