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Restore the len >= 288 condition on using the AVX implementation, which was incidentally removed by commit318c53ae02
("crypto: x86/poly1305 - Add block-only interface"). This check took into account the overhead in key power computation, kernel-mode "FPU", and tail handling associated with the AVX code. Indeed, restoring this check slightly improves performance for len < 256 as measured using poly1305_kunit on an "AMD Ryzen AI 9 365" (Zen 5) CPU: Length Before After ====== ========== ========== 1 30 MB/s 36 MB/s 16 516 MB/s 598 MB/s 64 1700 MB/s 1882 MB/s 127 2265 MB/s 2651 MB/s 128 2457 MB/s 2827 MB/s 200 2702 MB/s 3238 MB/s 256 3841 MB/s 3768 MB/s 511 4580 MB/s 4585 MB/s 512 5430 MB/s 5398 MB/s 1024 7268 MB/s 7305 MB/s 3173 8999 MB/s 8948 MB/s 4096 9942 MB/s 9921 MB/s 16384 10557 MB/s 10545 MB/s While the optimal threshold for this CPU might be slightly lower than 288 (see the len == 256 case), other CPUs would need to be tested too, and these sorts of benchmarks can underestimate the true cost of kernel-mode "FPU". Therefore, for now just restore the 288 threshold. Fixes:318c53ae02
("crypto: x86/poly1305 - Add block-only interface") Cc: stable@vger.kernel.org Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20250706231100.176113-6-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
175 lines
6.1 KiB
C
175 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
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*/
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#include <asm/cpu_device_id.h>
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#include <asm/fpu/api.h>
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#include <crypto/internal/poly1305.h>
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#include <linux/jump_label.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sizes.h>
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#include <linux/unaligned.h>
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struct poly1305_arch_internal {
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union {
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struct {
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u32 h[5];
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u32 is_base2_26;
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};
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u64 hs[3];
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};
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u64 r[2];
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u64 pad;
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struct { u32 r2, r1, r4, r3; } rn[9];
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};
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/*
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* The AVX code uses base 2^26, while the scalar code uses base 2^64. If we hit
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* the unfortunate situation of using AVX and then having to go back to scalar
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* -- because the user is silly and has called the update function from two
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* separate contexts -- then we need to convert back to the original base before
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* proceeding. It is possible to reason that the initial reduction below is
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* sufficient given the implementation invariants. However, for an avoidance of
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* doubt and because this is not performance critical, we do the full reduction
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* anyway. Z3 proof of below function: https://xn--4db.cc/ltPtHCKN/py
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*/
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static void convert_to_base2_64(void *ctx)
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{
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struct poly1305_arch_internal *state = ctx;
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u32 cy;
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if (!state->is_base2_26)
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return;
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cy = state->h[0] >> 26; state->h[0] &= 0x3ffffff; state->h[1] += cy;
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cy = state->h[1] >> 26; state->h[1] &= 0x3ffffff; state->h[2] += cy;
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cy = state->h[2] >> 26; state->h[2] &= 0x3ffffff; state->h[3] += cy;
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cy = state->h[3] >> 26; state->h[3] &= 0x3ffffff; state->h[4] += cy;
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state->hs[0] = ((u64)state->h[2] << 52) | ((u64)state->h[1] << 26) | state->h[0];
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state->hs[1] = ((u64)state->h[4] << 40) | ((u64)state->h[3] << 14) | (state->h[2] >> 12);
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state->hs[2] = state->h[4] >> 24;
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/* Unsigned Less Than: branchlessly produces 1 if a < b, else 0. */
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#define ULT(a, b) ((a ^ ((a ^ b) | ((a - b) ^ b))) >> (sizeof(a) * 8 - 1))
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cy = (state->hs[2] >> 2) + (state->hs[2] & ~3ULL);
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state->hs[2] &= 3;
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state->hs[0] += cy;
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state->hs[1] += (cy = ULT(state->hs[0], cy));
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state->hs[2] += ULT(state->hs[1], cy);
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#undef ULT
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state->is_base2_26 = 0;
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}
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asmlinkage void poly1305_block_init_arch(
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struct poly1305_block_state *state,
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const u8 raw_key[POLY1305_BLOCK_SIZE]);
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EXPORT_SYMBOL_GPL(poly1305_block_init_arch);
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asmlinkage void poly1305_blocks_x86_64(struct poly1305_arch_internal *ctx,
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const u8 *inp,
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const size_t len, const u32 padbit);
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asmlinkage void poly1305_emit_x86_64(const struct poly1305_state *ctx,
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u8 mac[POLY1305_DIGEST_SIZE],
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const u32 nonce[4]);
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asmlinkage void poly1305_emit_avx(const struct poly1305_state *ctx,
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u8 mac[POLY1305_DIGEST_SIZE],
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const u32 nonce[4]);
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asmlinkage void poly1305_blocks_avx(struct poly1305_arch_internal *ctx,
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const u8 *inp, const size_t len,
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const u32 padbit);
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asmlinkage void poly1305_blocks_avx2(struct poly1305_arch_internal *ctx,
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const u8 *inp, const size_t len,
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const u32 padbit);
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asmlinkage void poly1305_blocks_avx512(struct poly1305_arch_internal *ctx,
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const u8 *inp,
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const size_t len, const u32 padbit);
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx);
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx2);
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx512);
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void poly1305_blocks_arch(struct poly1305_block_state *state, const u8 *inp,
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unsigned int len, u32 padbit)
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{
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struct poly1305_arch_internal *ctx =
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container_of(&state->h.h, struct poly1305_arch_internal, h);
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/* SIMD disables preemption, so relax after processing each page. */
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BUILD_BUG_ON(SZ_4K < POLY1305_BLOCK_SIZE ||
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SZ_4K % POLY1305_BLOCK_SIZE);
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/*
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* The AVX implementations have significant setup overhead (e.g. key
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* power computation, kernel FPU enabling) which makes them slower for
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* short messages. Fall back to the scalar implementation for messages
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* shorter than 288 bytes, unless the AVX-specific key setup has already
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* been performed (indicated by ctx->is_base2_26).
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*/
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if (!static_branch_likely(&poly1305_use_avx) ||
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(len < POLY1305_BLOCK_SIZE * 18 && !ctx->is_base2_26) ||
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unlikely(!irq_fpu_usable())) {
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convert_to_base2_64(ctx);
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poly1305_blocks_x86_64(ctx, inp, len, padbit);
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return;
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}
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do {
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const unsigned int bytes = min(len, SZ_4K);
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kernel_fpu_begin();
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if (static_branch_likely(&poly1305_use_avx512))
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poly1305_blocks_avx512(ctx, inp, bytes, padbit);
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else if (static_branch_likely(&poly1305_use_avx2))
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poly1305_blocks_avx2(ctx, inp, bytes, padbit);
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else
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poly1305_blocks_avx(ctx, inp, bytes, padbit);
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kernel_fpu_end();
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len -= bytes;
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inp += bytes;
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} while (len);
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}
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EXPORT_SYMBOL_GPL(poly1305_blocks_arch);
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void poly1305_emit_arch(const struct poly1305_state *ctx,
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u8 mac[POLY1305_DIGEST_SIZE], const u32 nonce[4])
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{
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if (!static_branch_likely(&poly1305_use_avx))
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poly1305_emit_x86_64(ctx, mac, nonce);
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else
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poly1305_emit_avx(ctx, mac, nonce);
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}
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EXPORT_SYMBOL_GPL(poly1305_emit_arch);
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bool poly1305_is_arch_optimized(void)
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{
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return static_key_enabled(&poly1305_use_avx);
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}
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EXPORT_SYMBOL(poly1305_is_arch_optimized);
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static int __init poly1305_simd_mod_init(void)
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{
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if (boot_cpu_has(X86_FEATURE_AVX) &&
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cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
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static_branch_enable(&poly1305_use_avx);
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if (boot_cpu_has(X86_FEATURE_AVX) && boot_cpu_has(X86_FEATURE_AVX2) &&
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cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
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static_branch_enable(&poly1305_use_avx2);
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if (boot_cpu_has(X86_FEATURE_AVX) && boot_cpu_has(X86_FEATURE_AVX2) &&
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boot_cpu_has(X86_FEATURE_AVX512F) &&
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cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM | XFEATURE_MASK_AVX512, NULL) &&
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/* Skylake downclocks unacceptably much when using zmm, but later generations are fast. */
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boot_cpu_data.x86_vfm != INTEL_SKYLAKE_X)
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static_branch_enable(&poly1305_use_avx512);
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return 0;
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}
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subsys_initcall(poly1305_simd_mod_init);
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static void __exit poly1305_simd_mod_exit(void)
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{
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}
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module_exit(poly1305_simd_mod_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
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MODULE_DESCRIPTION("Poly1305 authenticator");
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