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0b226380d4
Add bindings for the Memory Controller (MC) and External Memory Controller (EMC) found on the Tegra264 SoC. Tegra264 SoC has a different number of interrupt lines for MC sub-units: UCF_SOC, hub, hub common, syncpoint and MC channel. The total number of interrupt lines is eight. Update maxItems for MC interrupts accordingly. This also adds a header containing the memory client ID definitions that are used by the interconnects property in DT and the tegra_mc_client table in the MC driver. These IDs are defined by the hardware, so the numbering doesn't start at 0 and contains holes. Also added are the stream IDs for various hardware blocks found on Tegra264. These are allocated as blocks of 256 IDs and each block can be subdivided for additional fine-grained isolation if needed. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> [treding@nvidia.com: add SMMU stream IDs, squash patches] Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250709222147.3758356-2-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com> |
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| .. | ||
| mediatek,mt6893-memory-port.h | ||
| mediatek,mt8188-memory-port.h | ||
| mediatek,mt8365-larb-port.h | ||
| mt2701-larb-port.h | ||
| mt2712-larb-port.h | ||
| mt6779-larb-port.h | ||
| mt6795-larb-port.h | ||
| mt8167-larb-port.h | ||
| mt8173-larb-port.h | ||
| mt8183-larb-port.h | ||
| mt8186-memory-port.h | ||
| mt8192-larb-port.h | ||
| mt8195-memory-port.h | ||
| mtk-memory-port.h | ||
| nvidia,tegra264.h | ||
| tegra20-mc.h | ||
| tegra30-mc.h | ||
| tegra114-mc.h | ||
| tegra124-mc.h | ||
| tegra186-mc.h | ||
| tegra194-mc.h | ||
| tegra210-mc.h | ||
| tegra234-mc.h | ||