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The Allwinner A523/T527 SoCs have four CCUs, this adds the binding for the main and the PRCM R-CCU. The source clock list differs in some annoying details, and folding this into the existing Allwinner CCU clock binding document gets quite unwieldy, so create a new document for these CCUs. Add the new compatible string, along with the required input clock lists. This conditionally describes the input clock lists, to make adding support for the other two CCUs easier. Also add the DT binding headers, listing all the clocks with their ID numbers. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250307002628.10684-5-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
37 lines
938 B
C
37 lines
938 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/*
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* Copyright (C) 2024 Arm Ltd.
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*/
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#ifndef _DT_BINDINGS_CLK_SUN55I_A523_R_CCU_H_
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#define _DT_BINDINGS_CLK_SUN55I_A523_R_CCU_H_
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#define CLK_R_AHB 0
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#define CLK_R_APB0 1
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#define CLK_R_APB1 2
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#define CLK_R_TIMER0 3
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#define CLK_R_TIMER1 4
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#define CLK_R_TIMER2 5
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#define CLK_BUS_R_TIMER 6
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#define CLK_BUS_R_TWD 7
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#define CLK_R_PWMCTRL 8
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#define CLK_BUS_R_PWMCTRL 9
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#define CLK_R_SPI 10
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#define CLK_BUS_R_SPI 11
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#define CLK_BUS_R_SPINLOCK 12
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#define CLK_BUS_R_MSGBOX 13
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#define CLK_BUS_R_UART0 14
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#define CLK_BUS_R_UART1 15
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#define CLK_BUS_R_I2C0 16
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#define CLK_BUS_R_I2C1 17
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#define CLK_BUS_R_I2C2 18
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#define CLK_BUS_R_PPU0 19
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#define CLK_BUS_R_PPU1 20
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#define CLK_BUS_R_CPU_BIST 21
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#define CLK_R_IR_RX 22
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#define CLK_BUS_R_IR_RX 23
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#define CLK_BUS_R_DMA 24
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#define CLK_BUS_R_RTC 25
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#define CLK_BUS_R_CPUCFG 26
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#endif /* _DT_BINDINGS_CLK_SUN55I_A523_R_CCU_H_ */
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