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e4b700d389
The SG2044 top syscon device provide PLL clock control and some other misc feature of the SoC. Add the compatible string for SG2044 top syscon device. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250418020325.421257-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
27 lines
641 B
C
27 lines
641 B
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
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/*
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* Copyright (C) 2024 Inochi Amaoto <inochiama@gmail.com>
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*/
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#ifndef __DT_BINDINGS_SOPHGO_SG2044_PLL_H__
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#define __DT_BINDINGS_SOPHGO_SG2044_PLL_H__
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#define CLK_FPLL0 0
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#define CLK_FPLL1 1
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#define CLK_FPLL2 2
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#define CLK_DPLL0 3
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#define CLK_DPLL1 4
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#define CLK_DPLL2 5
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#define CLK_DPLL3 6
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#define CLK_DPLL4 7
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#define CLK_DPLL5 8
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#define CLK_DPLL6 9
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#define CLK_DPLL7 10
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#define CLK_MPLL0 11
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#define CLK_MPLL1 12
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#define CLK_MPLL2 13
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#define CLK_MPLL3 14
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#define CLK_MPLL4 15
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#define CLK_MPLL5 16
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#endif /* __DT_BINDINGS_SOPHGO_SG2044_PLL_H__ */
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