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Add a driver for the Intel Over-Clocking Watchdog found in Intel Platform Controller (PCH) chipsets. This watchdog is controlled via a simple single-register interface and would otherwise be standard except for the presence of a LOCK bit that can only be set once per power cycle, needing extra handling around it. Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20250317-ivo-intel_oc_wdt-v3-1-32c396f4eefd@siemens.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
233 lines
5.7 KiB
C
233 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel OC Watchdog driver
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*
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* Copyright (C) 2025, Siemens
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* Author: Diogo Ivo <diogo.ivo@siemens.com>
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*/
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#define DRV_NAME "intel_oc_wdt"
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#include <linux/acpi.h>
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#include <linux/bits.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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#define INTEL_OC_WDT_TOV GENMASK(9, 0)
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#define INTEL_OC_WDT_MIN_TOV 1
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#define INTEL_OC_WDT_MAX_TOV 1024
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#define INTEL_OC_WDT_DEF_TOV 60
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/*
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* One-time writable lock bit. If set forbids
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* modification of itself, _TOV and _EN until
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* next reboot.
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*/
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#define INTEL_OC_WDT_CTL_LCK BIT(12)
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#define INTEL_OC_WDT_EN BIT(14)
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#define INTEL_OC_WDT_NO_ICCSURV_STS BIT(24)
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#define INTEL_OC_WDT_ICCSURV_STS BIT(25)
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#define INTEL_OC_WDT_RLD BIT(31)
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#define INTEL_OC_WDT_STS_BITS (INTEL_OC_WDT_NO_ICCSURV_STS | \
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INTEL_OC_WDT_ICCSURV_STS)
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#define INTEL_OC_WDT_CTRL_REG(wdt) ((wdt)->ctrl_res->start)
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struct intel_oc_wdt {
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struct watchdog_device wdd;
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struct resource *ctrl_res;
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bool locked;
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};
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static int heartbeat;
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module_param(heartbeat, uint, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. (default="
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__MODULE_STRING(WDT_HEARTBEAT) ")");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static int intel_oc_wdt_start(struct watchdog_device *wdd)
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{
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struct intel_oc_wdt *oc_wdt = watchdog_get_drvdata(wdd);
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if (oc_wdt->locked)
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return 0;
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outl(inl(INTEL_OC_WDT_CTRL_REG(oc_wdt)) | INTEL_OC_WDT_EN,
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INTEL_OC_WDT_CTRL_REG(oc_wdt));
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return 0;
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}
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static int intel_oc_wdt_stop(struct watchdog_device *wdd)
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{
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struct intel_oc_wdt *oc_wdt = watchdog_get_drvdata(wdd);
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outl(inl(INTEL_OC_WDT_CTRL_REG(oc_wdt)) & ~INTEL_OC_WDT_EN,
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INTEL_OC_WDT_CTRL_REG(oc_wdt));
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return 0;
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}
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static int intel_oc_wdt_ping(struct watchdog_device *wdd)
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{
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struct intel_oc_wdt *oc_wdt = watchdog_get_drvdata(wdd);
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outl(inl(INTEL_OC_WDT_CTRL_REG(oc_wdt)) | INTEL_OC_WDT_RLD,
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INTEL_OC_WDT_CTRL_REG(oc_wdt));
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return 0;
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}
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static int intel_oc_wdt_set_timeout(struct watchdog_device *wdd,
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unsigned int t)
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{
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struct intel_oc_wdt *oc_wdt = watchdog_get_drvdata(wdd);
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outl((inl(INTEL_OC_WDT_CTRL_REG(oc_wdt)) & ~INTEL_OC_WDT_TOV) | (t - 1),
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INTEL_OC_WDT_CTRL_REG(oc_wdt));
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wdd->timeout = t;
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return 0;
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}
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static const struct watchdog_info intel_oc_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
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.identity = DRV_NAME,
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};
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static const struct watchdog_ops intel_oc_wdt_ops = {
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.owner = THIS_MODULE,
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.start = intel_oc_wdt_start,
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.stop = intel_oc_wdt_stop,
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.ping = intel_oc_wdt_ping,
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.set_timeout = intel_oc_wdt_set_timeout,
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};
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static int intel_oc_wdt_setup(struct intel_oc_wdt *oc_wdt)
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{
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struct watchdog_info *info;
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unsigned long val;
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val = inl(INTEL_OC_WDT_CTRL_REG(oc_wdt));
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if (val & INTEL_OC_WDT_STS_BITS)
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oc_wdt->wdd.bootstatus |= WDIOF_CARDRESET;
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oc_wdt->locked = !!(val & INTEL_OC_WDT_CTL_LCK);
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if (val & INTEL_OC_WDT_EN) {
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/*
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* No need to issue a ping here to "commit" the new timeout
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* value to hardware as the watchdog core schedules one
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* immediately when registering the watchdog.
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*/
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set_bit(WDOG_HW_RUNNING, &oc_wdt->wdd.status);
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if (oc_wdt->locked) {
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info = (struct watchdog_info *)&intel_oc_wdt_info;
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/*
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* Set nowayout unconditionally as we cannot stop
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* the watchdog.
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*/
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nowayout = true;
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/*
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* If we are locked read the current timeout value
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* and inform the core we can't change it.
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*/
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oc_wdt->wdd.timeout = (val & INTEL_OC_WDT_TOV) + 1;
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info->options &= ~WDIOF_SETTIMEOUT;
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dev_info(oc_wdt->wdd.parent,
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"Register access locked, heartbeat fixed at: %u s\n",
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oc_wdt->wdd.timeout);
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}
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} else if (oc_wdt->locked) {
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/*
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* In case the watchdog is disabled and locked there
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* is nothing we can do with it so just fail probing.
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*/
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return -EACCES;
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}
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val &= ~INTEL_OC_WDT_TOV;
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outl(val | (oc_wdt->wdd.timeout - 1), INTEL_OC_WDT_CTRL_REG(oc_wdt));
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return 0;
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}
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static int intel_oc_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct intel_oc_wdt *oc_wdt;
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struct watchdog_device *wdd;
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int ret;
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oc_wdt = devm_kzalloc(&pdev->dev, sizeof(*oc_wdt), GFP_KERNEL);
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if (!oc_wdt)
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return -ENOMEM;
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oc_wdt->ctrl_res = platform_get_resource(pdev, IORESOURCE_IO, 0);
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if (!oc_wdt->ctrl_res) {
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dev_err(&pdev->dev, "missing I/O resource\n");
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return -ENODEV;
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}
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if (!devm_request_region(&pdev->dev, oc_wdt->ctrl_res->start,
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resource_size(oc_wdt->ctrl_res), pdev->name)) {
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dev_err(dev, "resource %pR already in use, device disabled\n",
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oc_wdt->ctrl_res);
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return -EBUSY;
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}
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wdd = &oc_wdt->wdd;
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wdd->min_timeout = INTEL_OC_WDT_MIN_TOV;
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wdd->max_timeout = INTEL_OC_WDT_MAX_TOV;
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wdd->timeout = INTEL_OC_WDT_DEF_TOV;
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wdd->info = &intel_oc_wdt_info;
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wdd->ops = &intel_oc_wdt_ops;
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wdd->parent = dev;
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watchdog_init_timeout(wdd, heartbeat, dev);
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ret = intel_oc_wdt_setup(oc_wdt);
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if (ret)
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return ret;
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watchdog_set_drvdata(wdd, oc_wdt);
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watchdog_set_nowayout(wdd, nowayout);
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watchdog_stop_on_reboot(wdd);
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watchdog_stop_on_unregister(wdd);
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return devm_watchdog_register_device(dev, wdd);
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}
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static const struct acpi_device_id intel_oc_wdt_match[] = {
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{ "INT3F0D" },
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{ "INTC1099" },
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{ },
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};
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MODULE_DEVICE_TABLE(acpi, intel_oc_wdt_match);
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static struct platform_driver intel_oc_wdt_platform_driver = {
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.driver = {
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.name = DRV_NAME,
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.acpi_match_table = intel_oc_wdt_match,
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},
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.probe = intel_oc_wdt_probe,
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};
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module_platform_driver(intel_oc_wdt_platform_driver);
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MODULE_AUTHOR("Diogo Ivo <diogo.ivo@siemens.com>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Intel OC Watchdog driver");
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