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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Boot code changes: - A large series of changes to reorganize the x86 boot code into a better isolated and easier to maintain base of PIC early startup code in arch/x86/boot/startup/, by Ard Biesheuvel. Motivation & background: | Since commit | |c88d71508e
("x86/boot/64: Rewrite startup_64() in C") | | dated Jun 6 2017, we have been using C code on the boot path in a way | that is not supported by the toolchain, i.e., to execute non-PIC C | code from a mapping of memory that is different from the one provided | to the linker. It should have been obvious at the time that this was a | bad idea, given the need to sprinkle fixup_pointer() calls left and | right to manipulate global variables (including non-pointer variables) | without crashing. | | This C startup code has been expanding, and in particular, the SEV-SNP | startup code has been expanding over the past couple of years, and | grown many of these warts, where the C code needs to use special | annotations or helpers to access global objects. This tree includes the first phase of this work-in-progress x86 boot code reorganization. Scalability enhancements and micro-optimizations: - Improve code-patching scalability (Eric Dumazet) - Remove MFENCEs for X86_BUG_CLFLUSH_MONITOR (Andrew Cooper) CPU features enumeration updates: - Thorough reorganization and cleanup of CPUID parsing APIs (Ahmed S. Darwish) - Fix, refactor and clean up the cacheinfo code (Ahmed S. Darwish, Thomas Gleixner) - Update CPUID bitfields to x86-cpuid-db v2.3 (Ahmed S. Darwish) Memory management changes: - Allow temporary MMs when IRQs are on (Andy Lutomirski) - Opt-in to IRQs-off activate_mm() (Andy Lutomirski) - Simplify choose_new_asid() and generate better code (Borislav Petkov) - Simplify 32-bit PAE page table handling (Dave Hansen) - Always use dynamic memory layout (Kirill A. Shutemov) - Make SPARSEMEM_VMEMMAP the only memory model (Kirill A. Shutemov) - Make 5-level paging support unconditional (Kirill A. Shutemov) - Stop prefetching current->mm->mmap_lock on page faults (Mateusz Guzik) - Predict valid_user_address() returning true (Mateusz Guzik) - Consolidate initmem_init() (Mike Rapoport) FPU support and vector computing: - Enable Intel APX support (Chang S. Bae) - Reorgnize and clean up the xstate code (Chang S. Bae) - Make task_struct::thread constant size (Ingo Molnar) - Restore fpu_thread_struct_whitelist() to fix CONFIG_HARDENED_USERCOPY=y (Kees Cook) - Simplify the switch_fpu_prepare() + switch_fpu_finish() logic (Oleg Nesterov) - Always preserve non-user xfeatures/flags in __state_perm (Sean Christopherson) Microcode loader changes: - Help users notice when running old Intel microcode (Dave Hansen) - AMD: Do not return error when microcode update is not necessary (Annie Li) - AMD: Clean the cache if update did not load microcode (Boris Ostrovsky) Code patching (alternatives) changes: - Simplify, reorganize and clean up the x86 text-patching code (Ingo Molnar) - Make smp_text_poke_batch_process() subsume smp_text_poke_batch_finish() (Nikolay Borisov) - Refactor the {,un}use_temporary_mm() code (Peter Zijlstra) Debugging support: - Add early IDT and GDT loading to debug relocate_kernel() bugs (David Woodhouse) - Print the reason for the last reset on modern AMD CPUs (Yazen Ghannam) - Add AMD Zen debugging document (Mario Limonciello) - Fix opcode map (!REX2) superscript tags (Masami Hiramatsu) - Stop decoding i64 instructions in x86-64 mode at opcode (Masami Hiramatsu) CPU bugs and bug mitigations: - Remove X86_BUG_MMIO_UNKNOWN (Borislav Petkov) - Fix SRSO reporting on Zen1/2 with SMT disabled (Borislav Petkov) - Restructure and harmonize the various CPU bug mitigation methods (David Kaplan) - Fix spectre_v2 mitigation default on Intel (Pawan Gupta) MSR API: - Large MSR code and API cleanup (Xin Li) - In-kernel MSR API type cleanups and renames (Ingo Molnar) PKEYS: - Simplify PKRU update in signal frame (Chang S. Bae) NMI handling code: - Clean up, refactor and simplify the NMI handling code (Sohil Mehta) - Improve NMI duration console printouts (Sohil Mehta) Paravirt guests interface: - Restrict PARAVIRT_XXL to 64-bit only (Kirill A. Shutemov) SEV support: - Share the sev_secrets_pa value again (Tom Lendacky) x86 platform changes: - Introduce the <asm/amd/> header namespace (Ingo Molnar) - i2c: piix4, x86/platform: Move the SB800 PIIX4 FCH definitions to <asm/amd/fch.h> (Mario Limonciello) Fixes and cleanups: - x86 assembly code cleanups and fixes (Uros Bizjak) - Misc fixes and cleanups (Andi Kleen, Andy Lutomirski, Andy Shevchenko, Ard Biesheuvel, Bagas Sanjaya, Baoquan He, Borislav Petkov, Chang S. Bae, Chao Gao, Dan Williams, Dave Hansen, David Kaplan, David Woodhouse, Eric Biggers, Ingo Molnar, Josh Poimboeuf, Juergen Gross, Malaya Kumar Rout, Mario Limonciello, Nathan Chancellor, Oleg Nesterov, Pawan Gupta, Peter Zijlstra, Shivank Garg, Sohil Mehta, Thomas Gleixner, Uros Bizjak, Xin Li) Signed-off-by: Ingo Molnar <mingo@kernel.org> -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAmgy9WARHG1pbmdvQGtl cm5lbC5vcmcACgkQEnMQ0APhK1jJSw/+OW2zvAx602doujBIE17vFLU7R10Xwj5H lVgomkWCoTNscUZPhdT/iI+/kQF1fG8PtN9oZKUsTAUswldKJsqu7KevobviesiW qI+FqH/fhHaIk7GVh9VP65Dgrdki8zsgd7BFxD8pLRBlbZTxTxXNNkuNJrs6LxJh SxWp/FVtKo6Wd57qlUcsdo0tilAfcuhlEweFUarX55X2ouhdeHjcGNpxj9dHKOh8 M7R5yMYFrpfdpSms+WaCnKKahWHaIQtQTsPAyKwoVdtfl1kK+7NgaCF55Gbo3ogp r59JwC/CGruDa5QnnDizCwFIwpZw9M52Q1NhP/eLEZbDGB4Yya3b5NW+Ya+6rPvO ZZC3e1uUmlxW3lrYflUHurnwrVb2GjkQZOdf0gfnly/7LljIicIS2dk4qIQF9NBd sQPpW5hjmIz9CsfeL8QaJW38pQyMsQWznFuz4YVuHcLHvleb3hR+n4fNfV5Lx9bw oirVETSIT5hy/msAgShPqTqFUEiVCgp16ow20YstxxzFu/FQ+VG987tkeUyFkPMe q1v5yF1hty+TkM4naKendIZ/MJnsrv0AxaegFz9YQrKGL1UPiOajQbSyKbzbto7+ ozmtN0W80E8n4oQq008j8htpgIhDV91UjF5m33qB82uSqKihHPPTsVcbeg5nZwh2 ti5g/a1jk94= =JgQo -----END PGP SIGNATURE----- Merge tag 'x86-core-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull core x86 updates from Ingo Molnar: "Boot code changes: - A large series of changes to reorganize the x86 boot code into a better isolated and easier to maintain base of PIC early startup code in arch/x86/boot/startup/, by Ard Biesheuvel. Motivation & background: | Since commit | |c88d71508e
("x86/boot/64: Rewrite startup_64() in C") | | dated Jun 6 2017, we have been using C code on the boot path in a way | that is not supported by the toolchain, i.e., to execute non-PIC C | code from a mapping of memory that is different from the one provided | to the linker. It should have been obvious at the time that this was a | bad idea, given the need to sprinkle fixup_pointer() calls left and | right to manipulate global variables (including non-pointer variables) | without crashing. | | This C startup code has been expanding, and in particular, the SEV-SNP | startup code has been expanding over the past couple of years, and | grown many of these warts, where the C code needs to use special | annotations or helpers to access global objects. This tree includes the first phase of this work-in-progress x86 boot code reorganization. Scalability enhancements and micro-optimizations: - Improve code-patching scalability (Eric Dumazet) - Remove MFENCEs for X86_BUG_CLFLUSH_MONITOR (Andrew Cooper) CPU features enumeration updates: - Thorough reorganization and cleanup of CPUID parsing APIs (Ahmed S. Darwish) - Fix, refactor and clean up the cacheinfo code (Ahmed S. Darwish, Thomas Gleixner) - Update CPUID bitfields to x86-cpuid-db v2.3 (Ahmed S. Darwish) Memory management changes: - Allow temporary MMs when IRQs are on (Andy Lutomirski) - Opt-in to IRQs-off activate_mm() (Andy Lutomirski) - Simplify choose_new_asid() and generate better code (Borislav Petkov) - Simplify 32-bit PAE page table handling (Dave Hansen) - Always use dynamic memory layout (Kirill A. Shutemov) - Make SPARSEMEM_VMEMMAP the only memory model (Kirill A. Shutemov) - Make 5-level paging support unconditional (Kirill A. Shutemov) - Stop prefetching current->mm->mmap_lock on page faults (Mateusz Guzik) - Predict valid_user_address() returning true (Mateusz Guzik) - Consolidate initmem_init() (Mike Rapoport) FPU support and vector computing: - Enable Intel APX support (Chang S. Bae) - Reorgnize and clean up the xstate code (Chang S. Bae) - Make task_struct::thread constant size (Ingo Molnar) - Restore fpu_thread_struct_whitelist() to fix CONFIG_HARDENED_USERCOPY=y (Kees Cook) - Simplify the switch_fpu_prepare() + switch_fpu_finish() logic (Oleg Nesterov) - Always preserve non-user xfeatures/flags in __state_perm (Sean Christopherson) Microcode loader changes: - Help users notice when running old Intel microcode (Dave Hansen) - AMD: Do not return error when microcode update is not necessary (Annie Li) - AMD: Clean the cache if update did not load microcode (Boris Ostrovsky) Code patching (alternatives) changes: - Simplify, reorganize and clean up the x86 text-patching code (Ingo Molnar) - Make smp_text_poke_batch_process() subsume smp_text_poke_batch_finish() (Nikolay Borisov) - Refactor the {,un}use_temporary_mm() code (Peter Zijlstra) Debugging support: - Add early IDT and GDT loading to debug relocate_kernel() bugs (David Woodhouse) - Print the reason for the last reset on modern AMD CPUs (Yazen Ghannam) - Add AMD Zen debugging document (Mario Limonciello) - Fix opcode map (!REX2) superscript tags (Masami Hiramatsu) - Stop decoding i64 instructions in x86-64 mode at opcode (Masami Hiramatsu) CPU bugs and bug mitigations: - Remove X86_BUG_MMIO_UNKNOWN (Borislav Petkov) - Fix SRSO reporting on Zen1/2 with SMT disabled (Borislav Petkov) - Restructure and harmonize the various CPU bug mitigation methods (David Kaplan) - Fix spectre_v2 mitigation default on Intel (Pawan Gupta) MSR API: - Large MSR code and API cleanup (Xin Li) - In-kernel MSR API type cleanups and renames (Ingo Molnar) PKEYS: - Simplify PKRU update in signal frame (Chang S. Bae) NMI handling code: - Clean up, refactor and simplify the NMI handling code (Sohil Mehta) - Improve NMI duration console printouts (Sohil Mehta) Paravirt guests interface: - Restrict PARAVIRT_XXL to 64-bit only (Kirill A. Shutemov) SEV support: - Share the sev_secrets_pa value again (Tom Lendacky) x86 platform changes: - Introduce the <asm/amd/> header namespace (Ingo Molnar) - i2c: piix4, x86/platform: Move the SB800 PIIX4 FCH definitions to <asm/amd/fch.h> (Mario Limonciello) Fixes and cleanups: - x86 assembly code cleanups and fixes (Uros Bizjak) - Misc fixes and cleanups (Andi Kleen, Andy Lutomirski, Andy Shevchenko, Ard Biesheuvel, Bagas Sanjaya, Baoquan He, Borislav Petkov, Chang S. Bae, Chao Gao, Dan Williams, Dave Hansen, David Kaplan, David Woodhouse, Eric Biggers, Ingo Molnar, Josh Poimboeuf, Juergen Gross, Malaya Kumar Rout, Mario Limonciello, Nathan Chancellor, Oleg Nesterov, Pawan Gupta, Peter Zijlstra, Shivank Garg, Sohil Mehta, Thomas Gleixner, Uros Bizjak, Xin Li)" * tag 'x86-core-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (331 commits) x86/bugs: Fix spectre_v2 mitigation default on Intel x86/bugs: Restructure ITS mitigation x86/xen/msr: Fix uninitialized variable 'err' x86/msr: Remove a superfluous inclusion of <asm/asm.h> x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only x86/mm/64: Make 5-level paging support unconditional x86/mm/64: Make SPARSEMEM_VMEMMAP the only memory model x86/mm/64: Always use dynamic memory layout x86/bugs: Fix indentation due to ITS merge x86/cpuid: Rename hypervisor_cpuid_base()/for_each_possible_hypervisor_cpuid_base() to cpuid_base_hypervisor()/for_each_possible_cpuid_base_hypervisor() x86/cpu/intel: Rename CPUID(0x2) descriptors iterator parameter x86/cacheinfo: Rename CPUID(0x2) descriptors iterator parameter x86/cpuid: Rename cpuid_get_leaf_0x2_regs() to cpuid_leaf_0x2() x86/cpuid: Rename have_cpuid_p() to cpuid_feature() x86/cpuid: Set <asm/cpuid/api.h> as the main CPUID header x86/cpuid: Move CPUID(0x2) APIs into <cpuid/api.h> x86/msr: Add rdmsrl_on_cpu() compatibility wrapper x86/mm: Fix kernel-doc descriptions of various pgtable methods x86/asm-offsets: Export certain 'struct cpuinfo_x86' fields for 64-bit asm use too x86/boot: Defer initialization of VM space related global variables ...
532 lines
14 KiB
C
532 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* x86_pkg_temp_thermal driver
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* Copyright (c) 2013, Intel Corporation.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/intel_tcc.h>
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#include <linux/err.h>
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#include <linux/param.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/slab.h>
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#include <linux/pm.h>
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#include <linux/thermal.h>
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#include <linux/debugfs.h>
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#include <asm/cpu_device_id.h>
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#include <asm/msr.h>
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#include "thermal_interrupt.h"
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/*
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* Rate control delay: Idea is to introduce denounce effect
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* This should be long enough to avoid reduce events, when
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* threshold is set to a temperature, which is constantly
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* violated, but at the short enough to take any action.
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* The action can be remove threshold or change it to next
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* interesting setting. Based on experiments, in around
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* every 5 seconds under load will give us a significant
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* temperature change.
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*/
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#define PKG_TEMP_THERMAL_NOTIFY_DELAY 5000
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static int notify_delay_ms = PKG_TEMP_THERMAL_NOTIFY_DELAY;
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module_param(notify_delay_ms, int, 0644);
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MODULE_PARM_DESC(notify_delay_ms,
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"User space notification delay in milli seconds.");
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/* Number of trip points in thermal zone. Currently it can't
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* be more than 2. MSR can allow setting and getting notifications
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* for only 2 thresholds. This define enforces this, if there
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* is some wrong values returned by cpuid for number of thresholds.
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*/
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#define MAX_NUMBER_OF_TRIPS 2
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struct zone_device {
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int cpu;
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bool work_scheduled;
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u32 msr_pkg_therm_low;
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u32 msr_pkg_therm_high;
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struct delayed_work work;
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struct thermal_zone_device *tzone;
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struct cpumask cpumask;
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};
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static struct thermal_zone_params pkg_temp_tz_params = {
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.no_hwmon = true,
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};
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/* Keep track of how many zone pointers we allocated in init() */
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static int max_id __read_mostly;
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/* Array of zone pointers */
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static struct zone_device **zones;
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/* Serializes interrupt notification, work and hotplug */
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static DEFINE_RAW_SPINLOCK(pkg_temp_lock);
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/* Protects zone operation in the work function against hotplug removal */
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static DEFINE_MUTEX(thermal_zone_mutex);
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/* The dynamically assigned cpu hotplug state for module_exit() */
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static enum cpuhp_state pkg_thermal_hp_state __read_mostly;
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/* Debug counters to show using debugfs */
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static struct dentry *debugfs;
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static unsigned int pkg_interrupt_cnt;
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static unsigned int pkg_work_cnt;
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static void pkg_temp_debugfs_init(void)
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{
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debugfs = debugfs_create_dir("pkg_temp_thermal", NULL);
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debugfs_create_u32("pkg_thres_interrupt", S_IRUGO, debugfs,
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&pkg_interrupt_cnt);
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debugfs_create_u32("pkg_thres_work", S_IRUGO, debugfs,
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&pkg_work_cnt);
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}
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/*
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* Protection:
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*
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* - cpu hotplug: Read serialized by cpu hotplug lock
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* Write must hold pkg_temp_lock
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*
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* - Other callsites: Must hold pkg_temp_lock
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*/
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static struct zone_device *pkg_temp_thermal_get_dev(unsigned int cpu)
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{
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int id = topology_logical_die_id(cpu);
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if (id >= 0 && id < max_id)
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return zones[id];
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return NULL;
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}
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static int sys_get_curr_temp(struct thermal_zone_device *tzd, int *temp)
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{
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struct zone_device *zonedev = thermal_zone_device_priv(tzd);
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int val, ret;
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ret = intel_tcc_get_temp(zonedev->cpu, &val, true);
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if (ret < 0)
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return ret;
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*temp = val * 1000;
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pr_debug("sys_get_curr_temp %d\n", *temp);
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return 0;
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}
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static int
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sys_set_trip_temp(struct thermal_zone_device *tzd,
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const struct thermal_trip *trip, int temp)
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{
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struct zone_device *zonedev = thermal_zone_device_priv(tzd);
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unsigned int trip_index = THERMAL_TRIP_PRIV_TO_INT(trip->priv);
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u32 l, h, mask, shift, intr;
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int tj_max, val, ret;
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tj_max = intel_tcc_get_tjmax(zonedev->cpu);
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if (tj_max < 0)
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return tj_max;
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tj_max *= 1000;
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val = (tj_max - temp)/1000;
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if (trip_index >= MAX_NUMBER_OF_TRIPS || val < 0 || val > 0x7f)
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return -EINVAL;
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ret = rdmsr_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT,
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&l, &h);
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if (ret < 0)
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return ret;
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if (trip_index) {
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mask = THERM_MASK_THRESHOLD1;
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shift = THERM_SHIFT_THRESHOLD1;
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intr = THERM_INT_THRESHOLD1_ENABLE;
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} else {
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mask = THERM_MASK_THRESHOLD0;
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shift = THERM_SHIFT_THRESHOLD0;
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intr = THERM_INT_THRESHOLD0_ENABLE;
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}
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l &= ~mask;
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/*
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* When users space sets a trip temperature == 0, which is indication
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* that, it is no longer interested in receiving notifications.
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*/
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if (!temp) {
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l &= ~intr;
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} else {
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l |= val << shift;
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l |= intr;
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}
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return wrmsr_on_cpu(zonedev->cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT,
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l, h);
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}
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/* Thermal zone callback registry */
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static const struct thermal_zone_device_ops tzone_ops = {
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.get_temp = sys_get_curr_temp,
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.set_trip_temp = sys_set_trip_temp,
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};
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static bool pkg_thermal_rate_control(void)
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{
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return true;
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}
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/* Enable threshold interrupt on local package/cpu */
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static inline void enable_pkg_thres_interrupt(void)
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{
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u8 thres_0, thres_1;
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u32 l, h;
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rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
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/* only enable/disable if it had valid threshold value */
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thres_0 = (l & THERM_MASK_THRESHOLD0) >> THERM_SHIFT_THRESHOLD0;
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thres_1 = (l & THERM_MASK_THRESHOLD1) >> THERM_SHIFT_THRESHOLD1;
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if (thres_0)
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l |= THERM_INT_THRESHOLD0_ENABLE;
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if (thres_1)
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l |= THERM_INT_THRESHOLD1_ENABLE;
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wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
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}
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/* Disable threshold interrupt on local package/cpu */
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static inline void disable_pkg_thres_interrupt(void)
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{
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u32 l, h;
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rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
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l &= ~(THERM_INT_THRESHOLD0_ENABLE | THERM_INT_THRESHOLD1_ENABLE);
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wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
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}
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static void pkg_temp_thermal_threshold_work_fn(struct work_struct *work)
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{
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struct thermal_zone_device *tzone = NULL;
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int cpu = smp_processor_id();
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struct zone_device *zonedev;
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mutex_lock(&thermal_zone_mutex);
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raw_spin_lock_irq(&pkg_temp_lock);
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++pkg_work_cnt;
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zonedev = pkg_temp_thermal_get_dev(cpu);
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if (!zonedev) {
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raw_spin_unlock_irq(&pkg_temp_lock);
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mutex_unlock(&thermal_zone_mutex);
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return;
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}
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zonedev->work_scheduled = false;
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thermal_clear_package_intr_status(PACKAGE_LEVEL, THERM_LOG_THRESHOLD0 | THERM_LOG_THRESHOLD1);
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tzone = zonedev->tzone;
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enable_pkg_thres_interrupt();
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raw_spin_unlock_irq(&pkg_temp_lock);
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/*
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* If tzone is not NULL, then thermal_zone_mutex will prevent the
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* concurrent removal in the cpu offline callback.
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*/
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if (tzone)
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thermal_zone_device_update(tzone, THERMAL_EVENT_UNSPECIFIED);
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mutex_unlock(&thermal_zone_mutex);
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}
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static void pkg_thermal_schedule_work(int cpu, struct delayed_work *work)
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{
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unsigned long ms = msecs_to_jiffies(notify_delay_ms);
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schedule_delayed_work_on(cpu, work, ms);
|
|
}
|
|
|
|
static int pkg_thermal_notify(u64 msr_val)
|
|
{
|
|
int cpu = smp_processor_id();
|
|
struct zone_device *zonedev;
|
|
unsigned long flags;
|
|
|
|
raw_spin_lock_irqsave(&pkg_temp_lock, flags);
|
|
++pkg_interrupt_cnt;
|
|
|
|
disable_pkg_thres_interrupt();
|
|
|
|
/* Work is per package, so scheduling it once is enough. */
|
|
zonedev = pkg_temp_thermal_get_dev(cpu);
|
|
if (zonedev && !zonedev->work_scheduled) {
|
|
zonedev->work_scheduled = true;
|
|
pkg_thermal_schedule_work(zonedev->cpu, &zonedev->work);
|
|
}
|
|
|
|
raw_spin_unlock_irqrestore(&pkg_temp_lock, flags);
|
|
return 0;
|
|
}
|
|
|
|
static int pkg_temp_thermal_trips_init(int cpu, int tj_max,
|
|
struct thermal_trip *trips, int num_trips)
|
|
{
|
|
unsigned long thres_reg_value;
|
|
u32 mask, shift, eax, edx;
|
|
int ret, i;
|
|
|
|
for (i = 0; i < num_trips; i++) {
|
|
|
|
if (i) {
|
|
mask = THERM_MASK_THRESHOLD1;
|
|
shift = THERM_SHIFT_THRESHOLD1;
|
|
} else {
|
|
mask = THERM_MASK_THRESHOLD0;
|
|
shift = THERM_SHIFT_THRESHOLD0;
|
|
}
|
|
|
|
ret = rdmsr_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT,
|
|
&eax, &edx);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
thres_reg_value = (eax & mask) >> shift;
|
|
|
|
trips[i].temperature = thres_reg_value ?
|
|
tj_max - thres_reg_value * 1000 : THERMAL_TEMP_INVALID;
|
|
|
|
trips[i].type = THERMAL_TRIP_PASSIVE;
|
|
trips[i].flags |= THERMAL_TRIP_FLAG_RW_TEMP;
|
|
trips[i].priv = THERMAL_INT_TO_TRIP_PRIV(i);
|
|
|
|
pr_debug("%s: cpu=%d, trip=%d, temp=%d\n",
|
|
__func__, cpu, i, trips[i].temperature);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pkg_temp_thermal_device_add(unsigned int cpu)
|
|
{
|
|
struct thermal_trip trips[MAX_NUMBER_OF_TRIPS] = { 0 };
|
|
int id = topology_logical_die_id(cpu);
|
|
u32 eax, ebx, ecx, edx;
|
|
struct zone_device *zonedev;
|
|
int thres_count, err;
|
|
int tj_max;
|
|
|
|
if (id >= max_id)
|
|
return -ENOMEM;
|
|
|
|
cpuid(6, &eax, &ebx, &ecx, &edx);
|
|
thres_count = ebx & 0x07;
|
|
if (!thres_count)
|
|
return -ENODEV;
|
|
|
|
thres_count = clamp_val(thres_count, 0, MAX_NUMBER_OF_TRIPS);
|
|
|
|
tj_max = intel_tcc_get_tjmax(cpu);
|
|
if (tj_max < 0)
|
|
return tj_max;
|
|
tj_max *= 1000;
|
|
|
|
zonedev = kzalloc(sizeof(*zonedev), GFP_KERNEL);
|
|
if (!zonedev)
|
|
return -ENOMEM;
|
|
|
|
err = pkg_temp_thermal_trips_init(cpu, tj_max, trips, thres_count);
|
|
if (err)
|
|
goto out_kfree_zonedev;
|
|
|
|
INIT_DELAYED_WORK(&zonedev->work, pkg_temp_thermal_threshold_work_fn);
|
|
zonedev->cpu = cpu;
|
|
zonedev->tzone = thermal_zone_device_register_with_trips("x86_pkg_temp",
|
|
trips, thres_count,
|
|
zonedev, &tzone_ops, &pkg_temp_tz_params, 0, 0);
|
|
if (IS_ERR(zonedev->tzone)) {
|
|
err = PTR_ERR(zonedev->tzone);
|
|
goto out_kfree_zonedev;
|
|
}
|
|
err = thermal_zone_device_enable(zonedev->tzone);
|
|
if (err)
|
|
goto out_unregister_tz;
|
|
|
|
/* Store MSR value for package thermal interrupt, to restore at exit */
|
|
rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, zonedev->msr_pkg_therm_low,
|
|
zonedev->msr_pkg_therm_high);
|
|
|
|
cpumask_set_cpu(cpu, &zonedev->cpumask);
|
|
raw_spin_lock_irq(&pkg_temp_lock);
|
|
zones[id] = zonedev;
|
|
raw_spin_unlock_irq(&pkg_temp_lock);
|
|
|
|
return 0;
|
|
|
|
out_unregister_tz:
|
|
thermal_zone_device_unregister(zonedev->tzone);
|
|
out_kfree_zonedev:
|
|
kfree(zonedev);
|
|
return err;
|
|
}
|
|
|
|
static int pkg_thermal_cpu_offline(unsigned int cpu)
|
|
{
|
|
struct zone_device *zonedev = pkg_temp_thermal_get_dev(cpu);
|
|
bool lastcpu, was_target;
|
|
int target;
|
|
|
|
if (!zonedev)
|
|
return 0;
|
|
|
|
target = cpumask_any_but(&zonedev->cpumask, cpu);
|
|
cpumask_clear_cpu(cpu, &zonedev->cpumask);
|
|
lastcpu = target >= nr_cpu_ids;
|
|
/*
|
|
* Remove the sysfs files, if this is the last cpu in the package
|
|
* before doing further cleanups.
|
|
*/
|
|
if (lastcpu) {
|
|
struct thermal_zone_device *tzone = zonedev->tzone;
|
|
|
|
/*
|
|
* We must protect against a work function calling
|
|
* thermal_zone_update, after/while unregister. We null out
|
|
* the pointer under the zone mutex, so the worker function
|
|
* won't try to call.
|
|
*/
|
|
mutex_lock(&thermal_zone_mutex);
|
|
zonedev->tzone = NULL;
|
|
mutex_unlock(&thermal_zone_mutex);
|
|
|
|
thermal_zone_device_unregister(tzone);
|
|
}
|
|
|
|
/* Protect against work and interrupts */
|
|
raw_spin_lock_irq(&pkg_temp_lock);
|
|
|
|
/*
|
|
* Check whether this cpu was the current target and store the new
|
|
* one. When we drop the lock, then the interrupt notify function
|
|
* will see the new target.
|
|
*/
|
|
was_target = zonedev->cpu == cpu;
|
|
zonedev->cpu = target;
|
|
|
|
/*
|
|
* If this is the last CPU in the package remove the package
|
|
* reference from the array and restore the interrupt MSR. When we
|
|
* drop the lock neither the interrupt notify function nor the
|
|
* worker will see the package anymore.
|
|
*/
|
|
if (lastcpu) {
|
|
zones[topology_logical_die_id(cpu)] = NULL;
|
|
/* After this point nothing touches the MSR anymore. */
|
|
wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
|
|
zonedev->msr_pkg_therm_low, zonedev->msr_pkg_therm_high);
|
|
}
|
|
|
|
/*
|
|
* Check whether there is work scheduled and whether the work is
|
|
* targeted at the outgoing CPU.
|
|
*/
|
|
if (zonedev->work_scheduled && was_target) {
|
|
/*
|
|
* To cancel the work we need to drop the lock, otherwise
|
|
* we might deadlock if the work needs to be flushed.
|
|
*/
|
|
raw_spin_unlock_irq(&pkg_temp_lock);
|
|
cancel_delayed_work_sync(&zonedev->work);
|
|
raw_spin_lock_irq(&pkg_temp_lock);
|
|
/*
|
|
* If this is not the last cpu in the package and the work
|
|
* did not run after we dropped the lock above, then we
|
|
* need to reschedule the work, otherwise the interrupt
|
|
* stays disabled forever.
|
|
*/
|
|
if (!lastcpu && zonedev->work_scheduled)
|
|
pkg_thermal_schedule_work(target, &zonedev->work);
|
|
}
|
|
|
|
raw_spin_unlock_irq(&pkg_temp_lock);
|
|
|
|
/* Final cleanup if this is the last cpu */
|
|
if (lastcpu)
|
|
kfree(zonedev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pkg_thermal_cpu_online(unsigned int cpu)
|
|
{
|
|
struct zone_device *zonedev = pkg_temp_thermal_get_dev(cpu);
|
|
struct cpuinfo_x86 *c = &cpu_data(cpu);
|
|
|
|
/* Paranoia check */
|
|
if (!cpu_has(c, X86_FEATURE_DTHERM) || !cpu_has(c, X86_FEATURE_PTS))
|
|
return -ENODEV;
|
|
|
|
/* If the package exists, nothing to do */
|
|
if (zonedev) {
|
|
cpumask_set_cpu(cpu, &zonedev->cpumask);
|
|
return 0;
|
|
}
|
|
return pkg_temp_thermal_device_add(cpu);
|
|
}
|
|
|
|
static const struct x86_cpu_id __initconst pkg_temp_thermal_ids[] = {
|
|
X86_MATCH_VENDOR_FEATURE(INTEL, X86_FEATURE_PTS, NULL),
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(x86cpu, pkg_temp_thermal_ids);
|
|
|
|
static int __init pkg_temp_thermal_init(void)
|
|
{
|
|
int ret;
|
|
|
|
if (!x86_match_cpu(pkg_temp_thermal_ids))
|
|
return -ENODEV;
|
|
|
|
max_id = topology_max_packages() * topology_max_dies_per_package();
|
|
zones = kcalloc(max_id, sizeof(struct zone_device *),
|
|
GFP_KERNEL);
|
|
if (!zones)
|
|
return -ENOMEM;
|
|
|
|
ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "thermal/x86_pkg:online",
|
|
pkg_thermal_cpu_online, pkg_thermal_cpu_offline);
|
|
if (ret < 0)
|
|
goto err;
|
|
|
|
/* Store the state for module exit */
|
|
pkg_thermal_hp_state = ret;
|
|
|
|
platform_thermal_package_notify = pkg_thermal_notify;
|
|
platform_thermal_package_rate_control = pkg_thermal_rate_control;
|
|
|
|
/* Don't care if it fails */
|
|
pkg_temp_debugfs_init();
|
|
return 0;
|
|
|
|
err:
|
|
kfree(zones);
|
|
return ret;
|
|
}
|
|
module_init(pkg_temp_thermal_init)
|
|
|
|
static void __exit pkg_temp_thermal_exit(void)
|
|
{
|
|
platform_thermal_package_notify = NULL;
|
|
platform_thermal_package_rate_control = NULL;
|
|
|
|
cpuhp_remove_state(pkg_thermal_hp_state);
|
|
debugfs_remove_recursive(debugfs);
|
|
kfree(zones);
|
|
}
|
|
module_exit(pkg_temp_thermal_exit)
|
|
|
|
MODULE_IMPORT_NS("INTEL_TCC");
|
|
MODULE_DESCRIPTION("X86 PKG TEMP Thermal Driver");
|
|
MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
|
|
MODULE_LICENSE("GPL v2");
|