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1e67465d3b
Add base driver for SG2042 SoC and pin definition. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Link: https://lore.kernel.org/20250211051801.470800-7-inochiama@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
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*/
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#ifndef _PINCTRL_SOPHGO_SG2042_H
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#define _PINCTRL_SOPHGO_SG2042_H
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#include <linux/bits.h>
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#include <linux/bitfield.h>
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#include <linux/device.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinconf.h>
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#include "pinctrl-sophgo.h"
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#define PIN_FLAG_DEFAULT 0
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#define PIN_FLAG_WRITE_HIGH BIT(0)
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#define PIN_FLAG_ONLY_ONE_PULL BIT(1)
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#define PIN_FLAG_NO_PINMUX BIT(2)
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#define PIN_FLAG_NO_OEX_EN BIT(3)
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#define PIN_FLAG_IS_ETH BIT(4)
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struct sg2042_pin {
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struct sophgo_pin pin;
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u16 offset;
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};
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#define sophgo_to_sg2042_pin(_pin) \
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container_of((_pin), struct sg2042_pin, pin)
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extern const struct pinctrl_ops sg2042_pctrl_ops;
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extern const struct pinmux_ops sg2042_pmx_ops;
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extern const struct pinconf_ops sg2042_pconf_ops;
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extern const struct sophgo_cfg_ops sg2042_cfg_ops;
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#define SG2042_GENERAL_PIN(_id, _offset, _flag) \
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{ \
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.pin = { \
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.id = (_id), \
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.flags = (_flag), \
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}, \
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.offset = (_offset), \
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}
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#endif
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