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e97435ab09
Add pinctrl driver support for AMD SoC with isp41 hw ip block. Signed-off-by: Pratap Nirujogi <pratap.nirujogi@amd.com> Link: https://lore.kernel.org/20250304232051.2936557-1-pratap.nirujogi@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
95 lines
2.1 KiB
C
95 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* AMD ISP Pinctrl Driver
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*
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* Copyright (C) 2025 Advanced Micro Devices, Inc. All rights reserved.
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*
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*/
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static const struct pinctrl_pin_desc amdisp_pins[] = {
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PINCTRL_PIN(0, "GPIO_0"), /* sensor0 control */
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PINCTRL_PIN(1, "GPIO_1"), /* sensor1 control */
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PINCTRL_PIN(2, "GPIO_2"), /* sensor2 control */
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};
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#define AMDISP_GPIO_PINS(pin) \
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static const unsigned int gpio##pin##_pins[] = { pin }
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AMDISP_GPIO_PINS(0);
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AMDISP_GPIO_PINS(1);
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AMDISP_GPIO_PINS(2);
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static const unsigned int amdisp_range_pins[] = {
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0, 1, 2
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};
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static const char * const amdisp_range_pins_name[] = {
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"gpio0", "gpio1", "gpio2"
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};
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enum amdisp_functions {
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mux_gpio,
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mux_NA
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};
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static const char * const gpio_groups[] = {
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"gpio0", "gpio1", "gpio2"
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};
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/**
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* struct amdisp_function - a pinmux function
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* @name: Name of the pinmux function.
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* @groups: List of pingroups for this function.
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* @ngroups: Number of entries in @groups.
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*/
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struct amdisp_function {
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const char *name;
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const char * const *groups;
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unsigned int ngroups;
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};
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#define FUNCTION(fname) \
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[mux_##fname] = { \
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.name = #fname, \
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.groups = fname##_groups, \
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.ngroups = ARRAY_SIZE(fname##_groups), \
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}
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static const struct amdisp_function amdisp_functions[] = {
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FUNCTION(gpio),
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};
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/**
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* struct amdisp_pingroup - a pinmux group
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* @name: Name of the pinmux group.
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* @pins: List of pins for this group.
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* @npins: Number of entries in @pins.
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* @funcs: List of functions belongs to this group.
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* @nfuncs: Number of entries in @funcs.
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* @offset: Group offset in amdisp pinmux groups.
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*/
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struct amdisp_pingroup {
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const char *name;
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const unsigned int *pins;
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unsigned int npins;
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unsigned int *funcs;
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unsigned int nfuncs;
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unsigned int offset;
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};
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#define PINGROUP(id, f0) \
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{ \
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.name = "gpio" #id, \
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.pins = gpio##id##_pins, \
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.npins = ARRAY_SIZE(gpio##id##_pins), \
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.funcs = (int[]){ \
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mux_##f0, \
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}, \
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.nfuncs = 1, \
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.offset = id, \
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}
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static const struct amdisp_pingroup amdisp_groups[] = {
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PINGROUP(0, gpio),
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PINGROUP(1, gpio),
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PINGROUP(2, gpio),
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};
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