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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-08-05 16:54:27 +00:00

The i.MX8MP and i.MX95 USB3 PHY have different tuning parameter for same tuning field, this will add i.MX95 tuning support. Reviewed-by: Jun Li <jun.li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20250430094502.2723983-4-xu.yang_2@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
732 lines
18 KiB
C
732 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/* Copyright (c) 2017 NXP. */
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/usb/typec_mux.h>
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#define PHY_CTRL0 0x0
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#define PHY_CTRL0_REF_SSP_EN BIT(2)
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#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
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#define PHY_CTRL0_FSEL_24M 0x2a
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#define PHY_CTRL1 0x4
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#define PHY_CTRL1_RESET BIT(0)
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#define PHY_CTRL1_COMMONONN BIT(1)
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#define PHY_CTRL1_ATERESET BIT(3)
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#define PHY_CTRL1_VDATSRCENB0 BIT(19)
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#define PHY_CTRL1_VDATDETENB0 BIT(20)
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#define PHY_CTRL2 0x8
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#define PHY_CTRL2_TXENABLEN0 BIT(8)
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#define PHY_CTRL2_OTG_DISABLE BIT(9)
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#define PHY_CTRL3 0xc
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#define PHY_CTRL3_COMPDISTUNE_MASK GENMASK(2, 0)
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#define PHY_CTRL3_TXPREEMP_TUNE_MASK GENMASK(16, 15)
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#define PHY_CTRL3_TXRISE_TUNE_MASK GENMASK(21, 20)
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#define PHY_CTRL3_TXVREF_TUNE_MASK GENMASK(25, 22)
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#define PHY_CTRL3_TX_VBOOST_LEVEL_MASK GENMASK(31, 29)
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#define PHY_CTRL4 0x10
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#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK GENMASK(20, 15)
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#define PHY_CTRL5 0x14
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#define PHY_CTRL5_DMPWD_OVERRIDE_SEL BIT(23)
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#define PHY_CTRL5_DMPWD_OVERRIDE BIT(22)
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#define PHY_CTRL5_DPPWD_OVERRIDE_SEL BIT(21)
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#define PHY_CTRL5_DPPWD_OVERRIDE BIT(20)
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#define PHY_CTRL5_PCS_TX_SWING_FULL_MASK GENMASK(6, 0)
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#define PHY_CTRL6 0x18
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#define PHY_CTRL6_ALT_CLK_EN BIT(1)
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#define PHY_CTRL6_ALT_CLK_SEL BIT(0)
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#define PHY_TUNE_DEFAULT 0xffffffff
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#define TCA_CLK_RST 0x00
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#define TCA_CLK_RST_SW BIT(9)
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#define TCA_CLK_RST_REF_CLK_EN BIT(1)
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#define TCA_CLK_RST_SUSPEND_CLK_EN BIT(0)
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#define TCA_INTR_EN 0x04
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#define TCA_INTR_STS 0x08
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#define TCA_GCFG 0x10
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#define TCA_GCFG_ROLE_HSTDEV BIT(4)
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#define TCA_GCFG_OP_MODE GENMASK(1, 0)
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#define TCA_GCFG_OP_MODE_SYSMODE 0
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#define TCA_GCFG_OP_MODE_SYNCMODE 1
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#define TCA_TCPC 0x14
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#define TCA_TCPC_VALID BIT(4)
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#define TCA_TCPC_LOW_POWER_EN BIT(3)
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#define TCA_TCPC_ORIENTATION_NORMAL BIT(2)
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#define TCA_TCPC_MUX_CONTRL GENMASK(1, 0)
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#define TCA_TCPC_MUX_CONTRL_NO_CONN 0
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#define TCA_TCPC_MUX_CONTRL_USB_CONN 1
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#define TCA_SYSMODE_CFG 0x18
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#define TCA_SYSMODE_TCPC_DISABLE BIT(3)
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#define TCA_SYSMODE_TCPC_FLIP BIT(2)
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#define TCA_CTRLSYNCMODE_CFG0 0x20
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#define TCA_CTRLSYNCMODE_CFG1 0x20
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#define TCA_PSTATE 0x30
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#define TCA_PSTATE_CM_STS BIT(4)
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#define TCA_PSTATE_TX_STS BIT(3)
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#define TCA_PSTATE_RX_PLL_STS BIT(2)
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#define TCA_PSTATE_PIPE0_POWER_DOWN GENMASK(1, 0)
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#define TCA_GEN_STATUS 0x34
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#define TCA_GEN_DEV_POR BIT(12)
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#define TCA_GEN_REF_CLK_SEL BIT(8)
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#define TCA_GEN_TYPEC_FLIP_INVERT BIT(4)
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#define TCA_GEN_PHY_TYPEC_DISABLE BIT(3)
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#define TCA_GEN_PHY_TYPEC_FLIP BIT(2)
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#define TCA_VBUS_CTRL 0x40
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#define TCA_VBUS_STATUS 0x44
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#define TCA_INFO 0xfc
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struct tca_blk {
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struct typec_switch_dev *sw;
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void __iomem *base;
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struct mutex mutex;
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enum typec_orientation orientation;
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};
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struct imx8mq_usb_phy {
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struct phy *phy;
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struct clk *clk;
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void __iomem *base;
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struct regulator *vbus;
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struct tca_blk *tca;
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u32 pcs_tx_swing_full;
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u32 pcs_tx_deemph_3p5db;
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u32 tx_vref_tune;
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u32 tx_rise_tune;
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u32 tx_preemp_amp_tune;
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u32 tx_vboost_level;
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u32 comp_dis_tune;
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};
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static void tca_blk_orientation_set(struct tca_blk *tca,
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enum typec_orientation orientation);
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#ifdef CONFIG_TYPEC
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static int tca_blk_typec_switch_set(struct typec_switch_dev *sw,
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enum typec_orientation orientation)
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{
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struct imx8mq_usb_phy *imx_phy = typec_switch_get_drvdata(sw);
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struct tca_blk *tca = imx_phy->tca;
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int ret;
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if (tca->orientation == orientation)
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return 0;
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ret = clk_prepare_enable(imx_phy->clk);
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if (ret)
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return ret;
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tca_blk_orientation_set(tca, orientation);
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clk_disable_unprepare(imx_phy->clk);
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return 0;
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}
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static struct typec_switch_dev *tca_blk_get_typec_switch(struct platform_device *pdev,
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struct imx8mq_usb_phy *imx_phy)
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{
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struct device *dev = &pdev->dev;
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struct typec_switch_dev *sw;
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struct typec_switch_desc sw_desc = { };
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sw_desc.drvdata = imx_phy;
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sw_desc.fwnode = dev->fwnode;
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sw_desc.set = tca_blk_typec_switch_set;
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sw_desc.name = NULL;
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sw = typec_switch_register(dev, &sw_desc);
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if (IS_ERR(sw)) {
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dev_err(dev, "Error register tca orientation switch: %ld",
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PTR_ERR(sw));
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return NULL;
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}
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return sw;
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}
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static void tca_blk_put_typec_switch(struct typec_switch_dev *sw)
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{
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typec_switch_unregister(sw);
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}
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#else
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static struct typec_switch_dev *tca_blk_get_typec_switch(struct platform_device *pdev,
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struct imx8mq_usb_phy *imx_phy)
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{
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return NULL;
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}
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static void tca_blk_put_typec_switch(struct typec_switch_dev *sw) {}
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#endif /* CONFIG_TYPEC */
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static void tca_blk_orientation_set(struct tca_blk *tca,
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enum typec_orientation orientation)
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{
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u32 val;
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mutex_lock(&tca->mutex);
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if (orientation == TYPEC_ORIENTATION_NONE) {
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/*
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* use Controller Synced Mode for TCA low power enable and
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* put PHY to USB safe state.
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*/
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val = FIELD_PREP(TCA_GCFG_OP_MODE, TCA_GCFG_OP_MODE_SYNCMODE);
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writel(val, tca->base + TCA_GCFG);
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val = TCA_TCPC_VALID | TCA_TCPC_LOW_POWER_EN;
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writel(val, tca->base + TCA_TCPC);
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goto out;
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}
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/* use System Configuration Mode for TCA mux control. */
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val = FIELD_PREP(TCA_GCFG_OP_MODE, TCA_GCFG_OP_MODE_SYSMODE);
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writel(val, tca->base + TCA_GCFG);
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/* Disable TCA module */
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val = readl(tca->base + TCA_SYSMODE_CFG);
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val |= TCA_SYSMODE_TCPC_DISABLE;
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writel(val, tca->base + TCA_SYSMODE_CFG);
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if (orientation == TYPEC_ORIENTATION_REVERSE)
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val |= TCA_SYSMODE_TCPC_FLIP;
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else if (orientation == TYPEC_ORIENTATION_NORMAL)
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val &= ~TCA_SYSMODE_TCPC_FLIP;
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writel(val, tca->base + TCA_SYSMODE_CFG);
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/* Enable TCA module */
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val &= ~TCA_SYSMODE_TCPC_DISABLE;
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writel(val, tca->base + TCA_SYSMODE_CFG);
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out:
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tca->orientation = orientation;
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mutex_unlock(&tca->mutex);
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}
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static void tca_blk_init(struct tca_blk *tca)
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{
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u32 val;
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/* reset XBar block */
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val = readl(tca->base + TCA_CLK_RST);
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val &= ~TCA_CLK_RST_SW;
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writel(val, tca->base + TCA_CLK_RST);
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udelay(100);
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/* clear reset */
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val |= TCA_CLK_RST_SW;
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writel(val, tca->base + TCA_CLK_RST);
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tca_blk_orientation_set(tca, tca->orientation);
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}
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static struct tca_blk *imx95_usb_phy_get_tca(struct platform_device *pdev,
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struct imx8mq_usb_phy *imx_phy)
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct tca_blk *tca;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (!res)
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return NULL;
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tca = devm_kzalloc(dev, sizeof(*tca), GFP_KERNEL);
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if (!tca)
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return ERR_PTR(-ENOMEM);
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tca->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(tca->base))
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return ERR_CAST(tca->base);
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mutex_init(&tca->mutex);
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tca->orientation = TYPEC_ORIENTATION_NORMAL;
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tca->sw = tca_blk_get_typec_switch(pdev, imx_phy);
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return tca;
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}
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static void imx95_usb_phy_put_tca(struct imx8mq_usb_phy *imx_phy)
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{
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struct tca_blk *tca = imx_phy->tca;
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if (!tca)
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return;
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tca_blk_put_typec_switch(tca->sw);
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}
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static u32 phy_tx_vref_tune_from_property(u32 percent)
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{
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percent = clamp(percent, 94U, 124U);
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return DIV_ROUND_CLOSEST(percent - 94U, 2);
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}
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static u32 imx95_phy_tx_vref_tune_from_property(u32 percent)
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{
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percent = clamp(percent, 90U, 108U);
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switch (percent) {
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case 90 ... 91:
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percent = 0;
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break;
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case 92 ... 96:
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percent -= 91;
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break;
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case 97 ... 104:
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percent -= 92;
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break;
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case 105 ... 108:
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percent -= 93;
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break;
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}
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return percent;
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}
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static u32 phy_tx_rise_tune_from_property(u32 percent)
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{
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switch (percent) {
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case 0 ... 98:
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return 3;
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case 99:
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return 2;
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case 100 ... 101:
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return 1;
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default:
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return 0;
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}
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}
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static u32 imx95_phy_tx_rise_tune_from_property(u32 percent)
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{
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percent = clamp(percent, 90U, 120U);
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switch (percent) {
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case 90 ... 99:
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return 3;
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case 101 ... 115:
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return 1;
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case 116 ... 120:
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return 0;
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default:
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return 2;
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}
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}
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static u32 phy_tx_preemp_amp_tune_from_property(u32 microamp)
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{
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microamp = min(microamp, 1800U);
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return microamp / 600;
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}
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static u32 phy_tx_vboost_level_from_property(u32 microvolt)
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{
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switch (microvolt) {
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case 1156:
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return 5;
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case 844:
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return 3;
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default:
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return 4;
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}
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}
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static u32 phy_pcs_tx_deemph_3p5db_from_property(u32 decibel)
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{
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return min(decibel, 36U);
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}
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static u32 phy_comp_dis_tune_from_property(u32 percent)
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{
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switch (percent) {
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case 0 ... 92:
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return 0;
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case 93 ... 95:
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return 1;
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case 96 ... 97:
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return 2;
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case 98 ... 102:
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return 3;
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case 103 ... 105:
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return 4;
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case 106 ... 109:
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return 5;
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case 110 ... 113:
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return 6;
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default:
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return 7;
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}
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}
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static u32 imx95_phy_comp_dis_tune_from_property(u32 percent)
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{
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percent = clamp(percent, 94, 104);
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switch (percent) {
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case 94 ... 95:
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percent = 0;
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break;
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case 96 ... 98:
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percent -= 95;
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break;
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case 99 ... 102:
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percent -= 96;
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break;
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case 103 ... 104:
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percent -= 97;
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break;
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}
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return percent;
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}
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static u32 phy_pcs_tx_swing_full_from_property(u32 percent)
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{
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percent = min(percent, 100U);
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return (percent * 127) / 100;
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}
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static void imx8m_get_phy_tuning_data(struct imx8mq_usb_phy *imx_phy)
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{
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struct device *dev = imx_phy->phy->dev.parent;
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bool is_imx95 = false;
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if (device_is_compatible(dev, "fsl,imx95-usb-phy"))
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is_imx95 = true;
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if (device_property_read_u32(dev, "fsl,phy-tx-vref-tune-percent",
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&imx_phy->tx_vref_tune))
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imx_phy->tx_vref_tune = PHY_TUNE_DEFAULT;
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else if (is_imx95)
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imx_phy->tx_vref_tune =
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imx95_phy_tx_vref_tune_from_property(imx_phy->tx_vref_tune);
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else
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imx_phy->tx_vref_tune =
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phy_tx_vref_tune_from_property(imx_phy->tx_vref_tune);
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if (device_property_read_u32(dev, "fsl,phy-tx-rise-tune-percent",
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&imx_phy->tx_rise_tune))
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imx_phy->tx_rise_tune = PHY_TUNE_DEFAULT;
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else if (is_imx95)
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imx_phy->tx_rise_tune =
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imx95_phy_tx_rise_tune_from_property(imx_phy->tx_rise_tune);
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else
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imx_phy->tx_rise_tune =
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phy_tx_rise_tune_from_property(imx_phy->tx_rise_tune);
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if (device_property_read_u32(dev, "fsl,phy-tx-preemp-amp-tune-microamp",
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&imx_phy->tx_preemp_amp_tune))
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imx_phy->tx_preemp_amp_tune = PHY_TUNE_DEFAULT;
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else
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imx_phy->tx_preemp_amp_tune =
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phy_tx_preemp_amp_tune_from_property(imx_phy->tx_preemp_amp_tune);
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if (device_property_read_u32(dev, "fsl,phy-tx-vboost-level-microvolt",
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&imx_phy->tx_vboost_level))
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imx_phy->tx_vboost_level = PHY_TUNE_DEFAULT;
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else
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imx_phy->tx_vboost_level =
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phy_tx_vboost_level_from_property(imx_phy->tx_vboost_level);
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if (device_property_read_u32(dev, "fsl,phy-comp-dis-tune-percent",
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&imx_phy->comp_dis_tune))
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imx_phy->comp_dis_tune = PHY_TUNE_DEFAULT;
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else if (is_imx95)
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imx_phy->comp_dis_tune =
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imx95_phy_comp_dis_tune_from_property(imx_phy->comp_dis_tune);
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else
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imx_phy->comp_dis_tune =
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phy_comp_dis_tune_from_property(imx_phy->comp_dis_tune);
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if (device_property_read_u32(dev, "fsl,phy-pcs-tx-deemph-3p5db-attenuation-db",
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&imx_phy->pcs_tx_deemph_3p5db))
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imx_phy->pcs_tx_deemph_3p5db = PHY_TUNE_DEFAULT;
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else
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imx_phy->pcs_tx_deemph_3p5db =
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phy_pcs_tx_deemph_3p5db_from_property(imx_phy->pcs_tx_deemph_3p5db);
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if (device_property_read_u32(dev, "fsl,phy-pcs-tx-swing-full-percent",
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&imx_phy->pcs_tx_swing_full))
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imx_phy->pcs_tx_swing_full = PHY_TUNE_DEFAULT;
|
|
else
|
|
imx_phy->pcs_tx_swing_full =
|
|
phy_pcs_tx_swing_full_from_property(imx_phy->pcs_tx_swing_full);
|
|
}
|
|
|
|
static void imx8m_phy_tune(struct imx8mq_usb_phy *imx_phy)
|
|
{
|
|
u32 value;
|
|
|
|
/* PHY tuning */
|
|
if (imx_phy->pcs_tx_deemph_3p5db != PHY_TUNE_DEFAULT) {
|
|
value = readl(imx_phy->base + PHY_CTRL4);
|
|
value &= ~PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK;
|
|
value |= FIELD_PREP(PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK,
|
|
imx_phy->pcs_tx_deemph_3p5db);
|
|
writel(value, imx_phy->base + PHY_CTRL4);
|
|
}
|
|
|
|
if (imx_phy->pcs_tx_swing_full != PHY_TUNE_DEFAULT) {
|
|
value = readl(imx_phy->base + PHY_CTRL5);
|
|
value |= FIELD_PREP(PHY_CTRL5_PCS_TX_SWING_FULL_MASK,
|
|
imx_phy->pcs_tx_swing_full);
|
|
writel(value, imx_phy->base + PHY_CTRL5);
|
|
}
|
|
|
|
if ((imx_phy->tx_vref_tune & imx_phy->tx_rise_tune &
|
|
imx_phy->tx_preemp_amp_tune & imx_phy->comp_dis_tune &
|
|
imx_phy->tx_vboost_level) == PHY_TUNE_DEFAULT)
|
|
/* If all are the default values, no need update. */
|
|
return;
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL3);
|
|
|
|
if (imx_phy->tx_vref_tune != PHY_TUNE_DEFAULT) {
|
|
value &= ~PHY_CTRL3_TXVREF_TUNE_MASK;
|
|
value |= FIELD_PREP(PHY_CTRL3_TXVREF_TUNE_MASK,
|
|
imx_phy->tx_vref_tune);
|
|
}
|
|
|
|
if (imx_phy->tx_rise_tune != PHY_TUNE_DEFAULT) {
|
|
value &= ~PHY_CTRL3_TXRISE_TUNE_MASK;
|
|
value |= FIELD_PREP(PHY_CTRL3_TXRISE_TUNE_MASK,
|
|
imx_phy->tx_rise_tune);
|
|
}
|
|
|
|
if (imx_phy->tx_preemp_amp_tune != PHY_TUNE_DEFAULT) {
|
|
value &= ~PHY_CTRL3_TXPREEMP_TUNE_MASK;
|
|
value |= FIELD_PREP(PHY_CTRL3_TXPREEMP_TUNE_MASK,
|
|
imx_phy->tx_preemp_amp_tune);
|
|
}
|
|
|
|
if (imx_phy->comp_dis_tune != PHY_TUNE_DEFAULT) {
|
|
value &= ~PHY_CTRL3_COMPDISTUNE_MASK;
|
|
value |= FIELD_PREP(PHY_CTRL3_COMPDISTUNE_MASK,
|
|
imx_phy->comp_dis_tune);
|
|
}
|
|
|
|
if (imx_phy->tx_vboost_level != PHY_TUNE_DEFAULT) {
|
|
value &= ~PHY_CTRL3_TX_VBOOST_LEVEL_MASK;
|
|
value |= FIELD_PREP(PHY_CTRL3_TX_VBOOST_LEVEL_MASK,
|
|
imx_phy->tx_vboost_level);
|
|
}
|
|
|
|
writel(value, imx_phy->base + PHY_CTRL3);
|
|
}
|
|
|
|
static int imx8mq_usb_phy_init(struct phy *phy)
|
|
{
|
|
struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
|
|
u32 value;
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL1);
|
|
value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0 |
|
|
PHY_CTRL1_COMMONONN);
|
|
value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
|
|
writel(value, imx_phy->base + PHY_CTRL1);
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL0);
|
|
value |= PHY_CTRL0_REF_SSP_EN;
|
|
writel(value, imx_phy->base + PHY_CTRL0);
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL2);
|
|
value |= PHY_CTRL2_TXENABLEN0;
|
|
writel(value, imx_phy->base + PHY_CTRL2);
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL1);
|
|
value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
|
|
writel(value, imx_phy->base + PHY_CTRL1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx8mp_usb_phy_init(struct phy *phy)
|
|
{
|
|
struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
|
|
u32 value;
|
|
|
|
/* USB3.0 PHY signal fsel for 24M ref */
|
|
value = readl(imx_phy->base + PHY_CTRL0);
|
|
value &= ~PHY_CTRL0_FSEL_MASK;
|
|
value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
|
|
writel(value, imx_phy->base + PHY_CTRL0);
|
|
|
|
/* Disable alt_clk_en and use internal MPLL clocks */
|
|
value = readl(imx_phy->base + PHY_CTRL6);
|
|
value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN);
|
|
writel(value, imx_phy->base + PHY_CTRL6);
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL1);
|
|
value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0);
|
|
value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
|
|
writel(value, imx_phy->base + PHY_CTRL1);
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL0);
|
|
value |= PHY_CTRL0_REF_SSP_EN;
|
|
writel(value, imx_phy->base + PHY_CTRL0);
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL2);
|
|
value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE;
|
|
writel(value, imx_phy->base + PHY_CTRL2);
|
|
|
|
udelay(10);
|
|
|
|
value = readl(imx_phy->base + PHY_CTRL1);
|
|
value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
|
|
writel(value, imx_phy->base + PHY_CTRL1);
|
|
|
|
imx8m_phy_tune(imx_phy);
|
|
|
|
if (imx_phy->tca)
|
|
tca_blk_init(imx_phy->tca);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx8mq_phy_power_on(struct phy *phy)
|
|
{
|
|
struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
|
|
int ret;
|
|
|
|
ret = regulator_enable(imx_phy->vbus);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return clk_prepare_enable(imx_phy->clk);
|
|
}
|
|
|
|
static int imx8mq_phy_power_off(struct phy *phy)
|
|
{
|
|
struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
|
|
|
|
clk_disable_unprepare(imx_phy->clk);
|
|
regulator_disable(imx_phy->vbus);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct phy_ops imx8mq_usb_phy_ops = {
|
|
.init = imx8mq_usb_phy_init,
|
|
.power_on = imx8mq_phy_power_on,
|
|
.power_off = imx8mq_phy_power_off,
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static const struct phy_ops imx8mp_usb_phy_ops = {
|
|
.init = imx8mp_usb_phy_init,
|
|
.power_on = imx8mq_phy_power_on,
|
|
.power_off = imx8mq_phy_power_off,
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static const struct of_device_id imx8mq_usb_phy_of_match[] = {
|
|
{.compatible = "fsl,imx8mq-usb-phy",
|
|
.data = &imx8mq_usb_phy_ops,},
|
|
{.compatible = "fsl,imx8mp-usb-phy",
|
|
.data = &imx8mp_usb_phy_ops,},
|
|
{.compatible = "fsl,imx95-usb-phy",
|
|
.data = &imx8mp_usb_phy_ops,},
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, imx8mq_usb_phy_of_match);
|
|
|
|
static int imx8mq_usb_phy_probe(struct platform_device *pdev)
|
|
{
|
|
struct phy_provider *phy_provider;
|
|
struct device *dev = &pdev->dev;
|
|
struct imx8mq_usb_phy *imx_phy;
|
|
const struct phy_ops *phy_ops;
|
|
|
|
imx_phy = devm_kzalloc(dev, sizeof(*imx_phy), GFP_KERNEL);
|
|
if (!imx_phy)
|
|
return -ENOMEM;
|
|
|
|
imx_phy->clk = devm_clk_get(dev, "phy");
|
|
if (IS_ERR(imx_phy->clk)) {
|
|
dev_err(dev, "failed to get imx8mq usb phy clock\n");
|
|
return PTR_ERR(imx_phy->clk);
|
|
}
|
|
|
|
imx_phy->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(imx_phy->base))
|
|
return PTR_ERR(imx_phy->base);
|
|
|
|
phy_ops = of_device_get_match_data(dev);
|
|
if (!phy_ops)
|
|
return -EINVAL;
|
|
|
|
imx_phy->phy = devm_phy_create(dev, NULL, phy_ops);
|
|
if (IS_ERR(imx_phy->phy))
|
|
return PTR_ERR(imx_phy->phy);
|
|
|
|
imx_phy->vbus = devm_regulator_get(dev, "vbus");
|
|
if (IS_ERR(imx_phy->vbus))
|
|
return dev_err_probe(dev, PTR_ERR(imx_phy->vbus), "failed to get vbus\n");
|
|
|
|
phy_set_drvdata(imx_phy->phy, imx_phy);
|
|
|
|
imx_phy->tca = imx95_usb_phy_get_tca(pdev, imx_phy);
|
|
if (IS_ERR(imx_phy->tca))
|
|
return dev_err_probe(dev, PTR_ERR(imx_phy->tca),
|
|
"failed to get tca\n");
|
|
|
|
imx8m_get_phy_tuning_data(imx_phy);
|
|
|
|
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
|
|
|
return PTR_ERR_OR_ZERO(phy_provider);
|
|
}
|
|
|
|
static void imx8mq_usb_phy_remove(struct platform_device *pdev)
|
|
{
|
|
struct imx8mq_usb_phy *imx_phy = platform_get_drvdata(pdev);
|
|
|
|
imx95_usb_phy_put_tca(imx_phy);
|
|
}
|
|
|
|
static struct platform_driver imx8mq_usb_phy_driver = {
|
|
.probe = imx8mq_usb_phy_probe,
|
|
.remove = imx8mq_usb_phy_remove,
|
|
.driver = {
|
|
.name = "imx8mq-usb-phy",
|
|
.of_match_table = imx8mq_usb_phy_of_match,
|
|
}
|
|
};
|
|
module_platform_driver(imx8mq_usb_phy_driver);
|
|
|
|
MODULE_DESCRIPTION("FSL IMX8MQ USB PHY driver");
|
|
MODULE_LICENSE("GPL");
|