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4cc05e3156
For next-generation chips, TX power by rate table comes from RFE (RF front end) parameter. It can be different according to RFE type. So, we indicate TX power by rate table inside RFE parameter ahead. For current chips, even with different RFE types, a chip is configured with a single TX power by rate table. So, this commit doesn't really affect these currently supported chips. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230920074322.42898-4-pkshih@realtek.com
18 lines
652 B
C
18 lines
652 B
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/* Copyright(c) 2019-2020 Realtek Corporation
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*/
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#ifndef __RTW89_8852A_TABLE_H__
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#define __RTW89_8852A_TABLE_H__
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#include "core.h"
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extern const struct rtw89_phy_table rtw89_8852a_phy_bb_table;
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extern const struct rtw89_phy_table rtw89_8852a_phy_radioa_table;
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extern const struct rtw89_phy_table rtw89_8852a_phy_radiob_table;
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extern const struct rtw89_phy_table rtw89_8852a_phy_nctl_table;
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extern const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table;
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extern const struct rtw89_txpwr_track_cfg rtw89_8852a_trk_cfg;
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extern const struct rtw89_rfe_parms rtw89_8852a_dflt_parms;
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#endif
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